generated_dts_board.h is pretty redundant and confusing as a name. Call it devicetree.h instead. dts.h would be another option, but DTS stands for "devicetree source" and is the source code format, so it's a bit confusing too. The replacement was done by grepping for 'generated_dts_board' and 'GENERATED_DTS_BOARD'. Two build diagram and input-output SVG files were updated as well, along with misc. documentation. hal_ti, mcuboot, and ci-tools updates are included too, in the west.yml update. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
259 lines
8 KiB
C
259 lines
8 KiB
C
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief ARM specific kernel interface header
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*
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* This header contains the ARM specific kernel interface. It is
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* included by the kernel interface architecture-abstraction header
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* (include/arm/cpu.h)
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_ARCH_H_
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#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_ARCH_H_
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/* Add include for DTS generated information */
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#include <devicetree.h>
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/* ARM GPRs are often designated by two different names */
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#define sys_define_gpr_with_alias(name1, name2) union { u32_t name1, name2; }
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#include <arch/arm/aarch32/thread.h>
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#include <arch/arm/aarch32/exc.h>
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#include <arch/arm/aarch32/irq.h>
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#include <arch/arm/aarch32/error.h>
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#include <arch/arm/aarch32/misc.h>
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#include <arch/common/addr_types.h>
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#include <arch/common/ffs.h>
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#include <arch/arm/aarch32/nmi.h>
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#include <arch/arm/aarch32/asm_inline.h>
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#ifdef CONFIG_CPU_CORTEX_M
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#include <arch/arm/aarch32/cortex_m/cpu.h>
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#include <arch/arm/aarch32/cortex_m/memory_map.h>
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#include <arch/common/sys_io.h>
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#elif defined(CONFIG_CPU_CORTEX_R)
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#include <arch/arm/aarch32/cortex_r/cpu.h>
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#include <arch/arm/aarch32/cortex_r/sys_io.h>
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Declare the STACK_ALIGN_SIZE
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*
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* Denotes the required alignment of the stack pointer on public API
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* boundaries
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*
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*/
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#ifdef CONFIG_STACK_ALIGN_DOUBLE_WORD
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#define STACK_ALIGN_SIZE 8
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#else
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#define STACK_ALIGN_SIZE 4
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#endif
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/**
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* @brief Declare the minimum alignment for a thread stack
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*
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* Denotes the minimum required alignment of a thread stack.
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*
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* Note:
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* User thread stacks must respect the minimum MPU region
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* alignment requirement.
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*/
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#if defined(CONFIG_USERSPACE)
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#define Z_THREAD_MIN_STACK_ALIGN CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
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#else
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#define Z_THREAD_MIN_STACK_ALIGN STACK_ALIGN_SIZE
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#endif
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/**
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* @brief Declare a minimum MPU guard alignment and size
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*
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* This specifies the minimum MPU guard alignment/size for the MPU. This
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* will be used to denote the guard section of the stack, if it exists.
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*
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* One key note is that this guard results in extra bytes being added to
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* the stack. APIs which give the stack ptr and stack size will take this
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* guard size into account.
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*
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* Stack is allocated, but initial stack pointer is at the end
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* (highest address). Stack grows down to the actual allocation
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* address (lowest address). Stack guard, if present, will comprise
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* the lowest MPU_GUARD_ALIGN_AND_SIZE bytes of the stack.
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*
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* As the stack grows down, it will reach the end of the stack when it
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* encounters either the stack guard region, or the stack allocation
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* address.
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*
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* ----------------------- <---- Stack allocation address + stack size +
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* | | MPU_GUARD_ALIGN_AND_SIZE
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* | Some thread data | <---- Defined when thread is created
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* | ... |
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* |---------------------| <---- Actual initial stack ptr
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* | Initial Stack Ptr | aligned to STACK_ALIGN_SIZE
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* | ... |
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* | ... |
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* | ... |
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* | ... |
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* | ... |
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* | ... |
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* | ... |
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* | ... |
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* | Stack Ends |
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* |---------------------- <---- Stack Buffer Ptr from API
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* | MPU Guard, |
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* | if present |
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* ----------------------- <---- Stack Allocation address
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*
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*/
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#if defined(CONFIG_MPU_STACK_GUARD)
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#define MPU_GUARD_ALIGN_AND_SIZE CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
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#else
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#define MPU_GUARD_ALIGN_AND_SIZE 0
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#endif
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/**
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* @brief Declare the MPU guard alignment and size for a thread stack
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* that is using the Floating Point services.
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*
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* For threads that are using the Floating Point services under Shared
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* Registers (CONFIG_FP_SHARING=y) mode, the exception stack frame may
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* contain both the basic stack frame and the FP caller-saved context,
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* upon exception entry. Therefore, a wide guard region is required to
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* guarantee that stack-overflow detection will always be successful.
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*/
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#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) \
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&& defined(CONFIG_MPU_STACK_GUARD)
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#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT
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#else
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#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT 0
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#endif
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/**
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* @brief Define alignment of an MPU guard
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*
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* Minimum alignment of the start address of an MPU guard, depending on
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* whether the MPU architecture enforces a size (and power-of-two) alignment
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* requirement.
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*/
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#if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
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#define Z_MPU_GUARD_ALIGN (MAX(MPU_GUARD_ALIGN_AND_SIZE, \
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MPU_GUARD_ALIGN_AND_SIZE_FLOAT))
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#else
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#define Z_MPU_GUARD_ALIGN MPU_GUARD_ALIGN_AND_SIZE
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#endif
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/**
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* @brief Define alignment of a stack buffer
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*
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* This is used for two different things:
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*
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* -# Used in checks for stack size to be a multiple of the stack buffer
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* alignment
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* -# Used to determine the alignment of a stack buffer
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*
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*/
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#define STACK_ALIGN MAX(Z_THREAD_MIN_STACK_ALIGN, Z_MPU_GUARD_ALIGN)
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/**
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* @brief Define alignment of a privilege stack buffer
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*
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* This is used to determine the required alignment of threads'
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* privilege stacks when building with support for user mode.
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*
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* @note
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* The privilege stacks do not need to respect the minimum MPU
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* region alignment requirement (unless this is enforced via
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* the MPU Stack Guard feature).
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*/
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#if defined(CONFIG_USERSPACE)
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#define Z_PRIVILEGE_STACK_ALIGN MAX(STACK_ALIGN_SIZE, Z_MPU_GUARD_ALIGN)
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#endif
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/**
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* @brief Calculate power of two ceiling for a buffer size input
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*
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*/
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#define POW2_CEIL(x) ((1 << (31 - __builtin_clz(x))) < x ? \
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1 << (31 - __builtin_clz(x) + 1) : \
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1 << (31 - __builtin_clz(x)))
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#if defined(CONFIG_USERSPACE) && \
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defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
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/* Guard is 'carved-out' of the thread stack region, and the supervisor
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* mode stack is allocated elsewhere by gen_priv_stack.py
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*/
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#define ARCH_THREAD_STACK_RESERVED 0
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#else
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#define ARCH_THREAD_STACK_RESERVED MPU_GUARD_ALIGN_AND_SIZE
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#endif
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#if defined(CONFIG_USERSPACE) && \
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defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
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#define ARCH_THREAD_STACK_DEFINE(sym, size) \
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struct _k_thread_stack_element __noinit \
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__aligned(POW2_CEIL(size)) sym[POW2_CEIL(size)]
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#else
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#define ARCH_THREAD_STACK_DEFINE(sym, size) \
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struct _k_thread_stack_element __noinit __aligned(STACK_ALIGN) \
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sym[size+MPU_GUARD_ALIGN_AND_SIZE]
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#endif
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#if defined(CONFIG_USERSPACE) && \
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defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
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#define ARCH_THREAD_STACK_LEN(size) (POW2_CEIL(size))
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#else
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#define ARCH_THREAD_STACK_LEN(size) ((size)+MPU_GUARD_ALIGN_AND_SIZE)
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#endif
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#if defined(CONFIG_USERSPACE) && \
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defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
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#define ARCH_THREAD_STACK_ARRAY_DEFINE(sym, nmemb, size) \
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struct _k_thread_stack_element __noinit \
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__aligned(POW2_CEIL(size)) \
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sym[nmemb][ARCH_THREAD_STACK_LEN(size)]
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#else
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#define ARCH_THREAD_STACK_ARRAY_DEFINE(sym, nmemb, size) \
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struct _k_thread_stack_element __noinit \
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__aligned(STACK_ALIGN) \
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sym[nmemb][ARCH_THREAD_STACK_LEN(size)]
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#endif
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#if defined(CONFIG_USERSPACE) && \
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defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
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#define ARCH_THREAD_STACK_MEMBER(sym, size) \
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struct _k_thread_stack_element __aligned(POW2_CEIL(size)) \
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sym[POW2_CEIL(size)]
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#else
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#define ARCH_THREAD_STACK_MEMBER(sym, size) \
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struct _k_thread_stack_element __aligned(STACK_ALIGN) \
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sym[size+MPU_GUARD_ALIGN_AND_SIZE]
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#endif
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#define ARCH_THREAD_STACK_SIZEOF(sym) (sizeof(sym) - MPU_GUARD_ALIGN_AND_SIZE)
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#define ARCH_THREAD_STACK_BUFFER(sym) \
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((char *)(sym) + MPU_GUARD_ALIGN_AND_SIZE)
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/* Legacy case: retain containing extern "C" with C++ */
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#ifdef CONFIG_ARM_MPU
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#ifdef CONFIG_CPU_HAS_ARM_MPU
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#include <arch/arm/aarch32/cortex_m/mpu/arm_mpu.h>
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#endif /* CONFIG_CPU_HAS_ARM_MPU */
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#ifdef CONFIG_CPU_HAS_NXP_MPU
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#include <arch/arm/aarch32/cortex_m/mpu/nxp_mpu.h>
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#endif /* CONFIG_CPU_HAS_NXP_MPU */
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#endif /* CONFIG_ARM_MPU */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_ARCH_H_ */
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