4d1139de91
Microchip MEC was configuring the kernel timer tick rate at the board level instead of the SoC level. We unify all this by moving the Kconfig logic out of the board level into each mec chip. We also derive SYS_CLOCK_HW_TICKS_PER_SEC from the device tree node enabled for the kernel timer: Microchip's 32 KHz RTOT timer or Cortex-M4 SYSTICK. The soc kconfig rules are loading all mec subdirectories for every build causing warnings when building new socs with this change. We made the changes for all the mec chips. Signed-off-by: Scott Worley <scott.worley@microchip.com>
26 lines
738 B
Text
26 lines
738 B
Text
# Copyright (c) 2024 Microchip Technology Inc.
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
# Microchip MEC174x MCU series configuration options
|
|
|
|
if SOC_SERIES_MEC174X
|
|
|
|
config NUM_IRQS
|
|
# must be >= the highest interrupt number used
|
|
# - include the UART interrupts
|
|
# All NVIC external sources.
|
|
default 194
|
|
|
|
config CORTEX_M_SYSTICK
|
|
depends on !MCHP_MEC5_KTIMER
|
|
|
|
config SYS_CLOCK_HW_CYCLES_PER_SEC
|
|
default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency) if CORTEX_M_SYSTICK
|
|
default $(dt_node_int_prop_int,/soc/timer@40007400,clock-frequency) if MCHP_MEC5_KTIMER
|
|
|
|
if MCHP_MEC5_KTIMER
|
|
config SYS_CLOCK_TICKS_PER_SEC
|
|
default $(dt_node_int_prop_int,/soc/timer@40007400,clock-frequency)
|
|
endif # MCHP_MEC5_KTIMER
|
|
|
|
endif # SOC_SERIES_MEC174X
|