4c57f3400a
The ARM Cortex-M1/M3 DesignStart FPGA reference designs support booting from an off-board, memory-mapped QSPI NOR flash device. The V2C DAPlink shield from ARM Ltd. provides support for this feature. If the board/shield is not configured for booting from the QSPI NOR device, that same device is available as a regular QSPI NOR flash device. The presense of a shield configured for QSPI NOR flash boot is indicated through an IRQ line used as a level-detect, non-interrupt signal. Introduce a board specific devicetree binding for the DAPLink QSPI MUX and provide a board specific API accessing it. Automatically set the QSPI MUX to to provide regular QSPI NOR flash access if the board/shield is not configured for memory-mapped QSPI NOR flash boot. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
284 lines
6.1 KiB
Text
284 lines
6.1 KiB
Text
/*
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* Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <mem.h>
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/ {
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chosen {
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zephyr,console = &uartlite0;
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zephyr,shell-uart = &uartlite0;
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zephyr,flash = &itcm;
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/* Use DTCM as SRAM by default */
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zephyr,sram = &dtcm;
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};
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aliases {
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led0 = &led_ld4;
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led1 = &led_ld5;
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led2 = &led_ld6;
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led3 = &led_ld7;
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sw0 = &sw0;
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sw1 = &sw1;
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sw2 = &sw2;
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sw3 = &sw3;
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};
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leds {
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compatible = "gpio-leds";
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led_ld0_red: led_ld0_red {
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gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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label = "LED LD0 RED";
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};
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led_ld0_green: led_ld0_green {
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gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
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label = "LED LD0 GREEN";
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};
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led_ld0_blue: led_ld0_blue {
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gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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label = "LED LD0 BLUE";
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};
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led_ld1_red: led_ld1_red {
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gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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label = "LED LD1 RED";
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};
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led_ld1_green: led_ld1_green {
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gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
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label = "LED LD1 GREEN";
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};
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led_ld1_blue: led_ld1_blue {
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gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
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label = "LED LD1 BLUE";
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};
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led_ld2_red: led_ld2_red {
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gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
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label = "LED LD2 RED";
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};
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led_ld2_green: led_ld2_green {
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gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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label = "LED LD2 GREEN";
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};
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led_ld2_blue: led_ld2_blue {
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gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
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label = "LED LD2 BLUE";
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};
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led_ld3_red: led_ld3_red {
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gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
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label = "LED LD3 RED";
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};
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led_ld3_green: led_ld3_green {
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gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
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label = "LED LD3 GREEN";
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};
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led_ld3_blue: led_ld3_blue {
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gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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label = "LED LD3 BLUE";
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};
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led_ld4: led_ld4 {
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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label = "LED LD4";
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};
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led_ld5: led_ld5 {
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gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
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label = "LED LD5";
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};
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led_ld6: led_ld6 {
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gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
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label = "LED LD6";
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};
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led_ld7: led_ld7 {
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gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
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label = "LED LD7";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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sw0: sw0 {
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gpios = <&gpio0_2 0 GPIO_ACTIVE_HIGH>;
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label = "SW0";
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};
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sw1: sw1 {
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gpios = <&gpio0_2 1 GPIO_ACTIVE_HIGH>;
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label = "SW1";
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};
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sw2: sw2 {
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gpios = <&gpio0_2 2 GPIO_ACTIVE_HIGH>;
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label = "SW2";
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};
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sw3: sw3 {
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gpios = <&gpio0_2 3 GPIO_ACTIVE_HIGH>;
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label = "SW3";
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};
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btn0: btn0 {
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gpios = <&gpio1_2 0 GPIO_ACTIVE_HIGH>;
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label = "BTN0";
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};
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btn1: btn1 {
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gpios = <&gpio1_2 1 GPIO_ACTIVE_HIGH>;
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label = "BTN1";
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};
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btn2: btn2 {
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gpios = <&gpio1_2 2 GPIO_ACTIVE_HIGH>;
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label = "BTN2";
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};
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btn3: btn3 {
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gpios = <&gpio1_2 3 GPIO_ACTIVE_HIGH>;
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label = "BTN3";
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};
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};
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daplink_qspi_mux: daplink_qspi_mux {
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compatible = "arm,daplink-qspi-mux";
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status = "disabled";
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interrupt-parent = <&nvic>;
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interrupts = <7 0>;
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mux-gpios = <&daplink_gpio0 0 GPIO_ACTIVE_HIGH>;
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};
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soc {
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daplink_gpio0: gpio@40010000 {
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compatible = "xlnx,xps-gpio-1.00.a";
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status = "disabled";
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reg = <0x40010000 0x10000>;
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label = "DAPLINK_GPIO_0";
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gpio-controller;
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#gpio-cells = <2>;
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xlnx,all-inputs = <0x0>;
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xlnx,all-outputs = <0x0>;
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xlnx,dout-default = <0x0>;
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xlnx,gpio-width = <0x20>;
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xlnx,is-dual = <0x0>;
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xlnx,tri-default = <0xffffffff>;
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};
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daplink_quad_spi0: spi@40020000 {
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compatible = "xlnx,xps-spi-2.00.a";
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status = "disabled";
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reg = <0x40020000 0x10000>;
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interrupts = <4 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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label = "DAPLINK_QUAD_SPI_0";
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xlnx,num-ss-bits = <0x1>;
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xlnx,num-transfer-bits = <0x8>;
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};
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daplink_single_spi0: spi@40030000 {
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compatible = "xlnx,xps-spi-2.00.a";
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status = "disabled";
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reg = <0x40030000 0x10000>;
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interrupts = <5 0>;
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label = "DAPLINK_SINGLE_SPI_0";
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#address-cells = <1>;
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#size-cells = <0>;
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xlnx,num-ss-bits = <0x1>;
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xlnx,num-transfer-bits = <0x8>;
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};
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uartlite0: uartlite@40100000 {
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compatible = "xlnx,xps-uartlite-1.00.a";
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interrupts = <0 0>;
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reg = <0x40100000 0x10000>;
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label = "UART_0";
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};
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gpio0: gpio@40110000 {
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compatible = "xlnx,xps-gpio-1.00.a";
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interrupts = <1 0>;
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reg = <0x40110000 0x10000>;
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label = "GPIO_0";
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gpio-controller;
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#gpio-cells = <2>;
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xlnx,all-inputs = <0x0>;
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xlnx,all-inputs-2 = <0x1>;
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xlnx,all-outputs = <0x0>;
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xlnx,all-outputs-2 = <0x0>;
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xlnx,dout-default = <0x0>;
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xlnx,dout-default-2 = <0x0>;
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xlnx,gpio-width = <0x4>;
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xlnx,gpio2-width = <0x4>;
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xlnx,is-dual = <0x1>;
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xlnx,tri-default = <0xffffffff>;
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xlnx,tri-default-2 = <0xffffffff>;
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gpio0_2: gpio2 {
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compatible = "xlnx,xps-gpio-1.00.a-gpio2";
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label = "GPIO_0_2";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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gpio1: gpio@40120000 {
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compatible = "xlnx,xps-gpio-1.00.a";
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interrupts = <2 0>;
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reg = <0x40120000 0x10000>;
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label = "GPIO_1";
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gpio-controller;
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#gpio-cells = <2>;
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xlnx,all-inputs = <0x0>;
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xlnx,all-inputs-2 = <0x1>;
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xlnx,all-outputs = <0x0>;
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xlnx,all-outputs-2 = <0x0>;
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xlnx,dout-default = <0x0>;
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xlnx,dout-default-2 = <0x0>;
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xlnx,gpio-width = <0xc>;
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xlnx,gpio2-width = <0x4>;
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xlnx,is-dual = <0x1>;
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xlnx,tri-default = <0xffffffff>;
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xlnx,tri-default-2 = <0xffffffff>;
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gpio1_2: gpio2 {
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compatible = "xlnx,xps-gpio-1.00.a-gpio2";
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label = "GPIO_1_2";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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quad_spi0: spi@40130000 {
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compatible = "xlnx,xps-spi-2.00.a";
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reg = <0x40130000 0x10000>;
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interrupts = <3 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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label = "QUAD_SPI_0";
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xlnx,num-ss-bits = <0x1>;
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xlnx,num-transfer-bits = <0x8>;
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flash0: flash@0 {
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compatible = "micron,n25q128a","jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <108000000>;
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size = <DT_SIZE_M(128)>;
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jedec-id = [20 ba 18];
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label = "FLASH_0";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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fpga_bitstream_partition: partition@0 {
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label = "fpga_bitstream";
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reg = <0x00000000 0x218000>;
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};
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};
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};
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};
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};
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};
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