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zephyr/dts/arm/adi/max32/max32666-pinctrl.dtsi
Sadik Ozer 497f2ce835 dts: adi: Enable low-power pin modes 
low-power pins can be used while device power management enabled.
Usage

...
&uart0a_rx_p0_0 {
  pinmux = <MAX32_PINMUX(0, 0, AF1)>;
  low-power-enable;
  /* Add low power mode flags, like: */
  output-high;
  bias-disable;
  ...
};
...

Default gpio sleep states are defined, user shall update sleep_pins
configuration as per of their needs

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2025-05-28 01:46:50 +02:00

1443 lines
34 KiB
Text
Raw Blame History

/*
* Copyright (c) 2023-2024 Analog Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>
/ {
soc {
pinctrl: pin-controller@40008000 {
/omit-if-no-ref/ spixf_ss0_p0_0: spixf_ss0_p0_0 {
pinmux = <MAX32_PINMUX(0, 0, AF1)>;
};
/omit-if-no-ref/ uart2_cts_p0_0: uart2_cts_p0_0 {
pinmux = <MAX32_PINMUX(0, 0, AF3)>;
};
/omit-if-no-ref/ tmr0_p0_0: tmr0_p0_0 {
pinmux = <MAX32_PINMUX(0, 0, AF4)>;
};
/omit-if-no-ref/ spixf_mosi_p0_1: spixf_mosi_p0_1 {
pinmux = <MAX32_PINMUX(0, 1, AF1)>;
};
/omit-if-no-ref/ uart2_tx_p0_1: uart2_tx_p0_1 {
pinmux = <MAX32_PINMUX(0, 1, AF3)>;
};
/omit-if-no-ref/ tmr1_p0_1: tmr1_p0_1 {
pinmux = <MAX32_PINMUX(0, 1, AF4)>;
};
/omit-if-no-ref/ spixf_miso_p0_2: spixf_miso_p0_2 {
pinmux = <MAX32_PINMUX(0, 2, AF1)>;
};
/omit-if-no-ref/ uart2_rx_p0_2: uart2_rx_p0_2 {
pinmux = <MAX32_PINMUX(0, 2, AF3)>;
};
/omit-if-no-ref/ tmr2_p0_2: tmr2_p0_2 {
pinmux = <MAX32_PINMUX(0, 2, AF4)>;
};
/omit-if-no-ref/ spixf_sck_p0_3: spixf_sck_p0_3 {
pinmux = <MAX32_PINMUX(0, 3, AF1)>;
};
/omit-if-no-ref/ uart2_rts_p0_3: uart2_rts_p0_3 {
pinmux = <MAX32_PINMUX(0, 3, AF3)>;
};
/omit-if-no-ref/ tmr3_p0_3: tmr3_p0_3 {
pinmux = <MAX32_PINMUX(0, 3, AF4)>;
};
/omit-if-no-ref/ spixf_sdio2_p0_4: spixf_sdio2_p0_4 {
pinmux = <MAX32_PINMUX(0, 4, AF1)>;
};
/omit-if-no-ref/ owm_io_p0_4: owm_io_p0_4 {
pinmux = <MAX32_PINMUX(0, 4, AF3)>;
};
/omit-if-no-ref/ tmr4_p0_4: tmr4_p0_4 {
pinmux = <MAX32_PINMUX(0, 4, AF4)>;
};
/omit-if-no-ref/ spixf_sdio3_p0_5: spixf_sdio3_p0_5 {
pinmux = <MAX32_PINMUX(0, 5, AF1)>;
};
/omit-if-no-ref/owm_pe_p0_5: owm_pe_p0_5 {
pinmux = <MAX32_PINMUX(0, 5, AF3)>;
};
/omit-if-no-ref/ tmr5_p0_5: tmr5_p0_5 {
pinmux = <MAX32_PINMUX(0, 5, AF4)>;
};
/omit-if-no-ref/ i2c0_scl_p0_6: i2c0_scl_p0_6 {
pinmux = <MAX32_PINMUX(0, 6, AF1)>;
};
/omit-if-no-ref/ swdio2_p0_6: swdio2_p0_6 {
pinmux = <MAX32_PINMUX(0, 6, AF3)>;
};
/omit-if-no-ref/ tmr0_p0_6: tmr0_p0_6 {
pinmux = <MAX32_PINMUX(0, 6, AF4)>;
};
/omit-if-no-ref/ i2c0_sda_p0_7: i2c0_sda_p0_7 {
pinmux = <MAX32_PINMUX(0, 7, AF1)>;
};
/omit-if-no-ref/ swclk2_p0_7: swclck2_p0_7 {
pinmux = <MAX32_PINMUX(0, 7, AF3)>;
};
/omit-if-no-ref/ tmr1_p0_7: tmr1_p0_7 {
pinmux = <MAX32_PINMUX(0, 7, AF4)>;
};
/omit-if-no-ref/ spixr_ss0_p0_8: spixr_ss0_p0_8 {
pinmux = <MAX32_PINMUX(0, 8, AF1)>;
};
/omit-if-no-ref/ spi0_ss0_p0_8: spi0_ss0_p0_8 {
pinmux = <MAX32_PINMUX(0, 8, AF2)>;
};
/omit-if-no-ref/ uart0_cts_p0_8: uart0_cts_p0_8 {
pinmux = <MAX32_PINMUX(0, 8, AF3)>;
};
/omit-if-no-ref/ tmr2_p0_8: tmr2_p0_8 {
pinmux = <MAX32_PINMUX(0, 8, AF4)>;
};
/omit-if-no-ref/ spixr_mosi_p0_9: spixr_mosi_p0_9 {
pinmux = <MAX32_PINMUX(0, 9, AF1)>;
};
/omit-if-no-ref/ spi0_mosi_p0_9: spi0_mosi_p0_9 {
pinmux = <MAX32_PINMUX(0, 9, AF2)>;
};
/omit-if-no-ref/ uart0_tx_p0_9: uart0_tx_p0_9 {
pinmux = <MAX32_PINMUX(0, 9, AF3)>;
};
/omit-if-no-ref/ tmr3_p0_9: tmr3_p0_9 {
pinmux = <MAX32_PINMUX(0, 9, AF4)>;
};
/omit-if-no-ref/ spixr_miso_p0_10: spixr_miso_p0_10 {
pinmux = <MAX32_PINMUX(0, 10, AF1)>;
};
/omit-if-no-ref/ spi0_miso_p0_10: spi0_miso_p0_10 {
pinmux = <MAX32_PINMUX(0, 10, AF2)>;
};
/omit-if-no-ref/ uart0_rx_p0_10: uart0_rx_p0_10 {
pinmux = <MAX32_PINMUX(0, 10, AF3)>;
};
/omit-if-no-ref/ tmr4_p0_10: tmr4_p0_10 {
pinmux = <MAX32_PINMUX(0, 10, AF4)>;
};
/omit-if-no-ref/ spixr_sck_p0_11: spixr_sck_p0_11 {
pinmux = <MAX32_PINMUX(0, 11, AF1)>;
};
/omit-if-no-ref/ spi0_sck_p0_11: spi0_sck_p0_11 {
pinmux = <MAX32_PINMUX(0, 11, AF2)>;
};
/omit-if-no-ref/ uart0_rts_p0_11: uart0_rts_p0_11 {
pinmux = <MAX32_PINMUX(0, 11, AF3)>;
};
/omit-if-no-ref/ tmr5_p0_11: tmr5_p0_11 {
pinmux = <MAX32_PINMUX(0, 11, AF4)>;
};
/omit-if-no-ref/ spixr_sdio2_p0_12: spixr_sdio2_p0_12 {
pinmux = <MAX32_PINMUX(0, 12, AF1)>;
};
/omit-if-no-ref/ spi0_sdio2_p0_12: spi0_sdio2_p0_12 {
pinmux = <MAX32_PINMUX(0, 12, AF2)>;
};
/omit-if-no-ref/ owm_io_p0_12: owm_io_p0_12 {
pinmux = <MAX32_PINMUX(0, 12, AF3)>;
};
/omit-if-no-ref/ tmr0_p0_12: tmr0_p0_12 {
pinmux = <MAX32_PINMUX(0, 12, AF4)>;
};
/omit-if-no-ref/ spixr_sdio3_p0_13: spixr_sdio3_p0_13 {
pinmux = <MAX32_PINMUX(0, 13, AF1)>;
};
/omit-if-no-ref/ spi0_sdio3_p0_13: spi0_sdio3_p0_13 {
pinmux = <MAX32_PINMUX(0, 13, AF2)>;
};
/omit-if-no-ref/ owm_pe_p0_13: owm_pe_p0_13 {
pinmux = <MAX32_PINMUX(0, 13, AF3)>;
};
/omit-if-no-ref/ tmr1_p0_13: tmr1_p0_13 {
pinmux = <MAX32_PINMUX(0, 13, AF4)>;
};
/omit-if-no-ref/ i2c1_scl_p0_14: i2c1_scl_p0_14 {
pinmux = <MAX32_PINMUX(0, 14, AF1)>;
};
/omit-if-no-ref/ spi0_ss1_p0_14: spi0_ss1_p0_14 {
pinmux = <MAX32_PINMUX(0, 14, AF2)>;
};
/omit-if-no-ref/ tmr2_p0_14: tmr2_p0_14 {
pinmux = <MAX32_PINMUX(0, 14, AF4)>;
};
/omit-if-no-ref/ i2c1_sda_p0_15: i2c1_sda_p0_15 {
pinmux = <MAX32_PINMUX(0, 15, AF1)>;
};
/omit-if-no-ref/ spi0_ss2_p0_15: spi0_ss2_p0_15 {
pinmux = <MAX32_PINMUX(0, 15, AF2)>;
};
/omit-if-no-ref/ tmr3_p0_15: tmr3_p0_15 {
pinmux = <MAX32_PINMUX(0, 15, AF4)>;
};
/omit-if-no-ref/ ain0n_p0_16: ain0n_p0_16 {
pinmux = <MAX32_PINMUX(0, 16, AF1)>;
};
/omit-if-no-ref/ spi1_ss0_p0_16: spi1_ss0_p0_16 {
pinmux = <MAX32_PINMUX(0, 16, AF2)>;
};
/omit-if-no-ref/ owm_io_p0_16: owm_io_p0_16 {
pinmux = <MAX32_PINMUX(0, 16, AF3)>;
};
/omit-if-no-ref/ tmr4_p0_16: tmr4_p0_16 {
pinmux = <MAX32_PINMUX(0, 16, AF4)>;
};
/omit-if-no-ref/ ain0p_p0_17: ain0p_p0_17 {
pinmux = <MAX32_PINMUX(0, 17, AF1)>;
};
/omit-if-no-ref/ spi1_mosi_p0_17: spi1_mosi_p0_17 {
pinmux = <MAX32_PINMUX(0, 17, AF2)>;
};
/omit-if-no-ref/ owm_pe_p0_17: owm_pe_p0_17 {
pinmux = <MAX32_PINMUX(0, 17, AF3)>;
};
/omit-if-no-ref/ tmr5_p0_17: tmr5_p0_17 {
pinmux = <MAX32_PINMUX(0, 17, AF4)>;
};
/omit-if-no-ref/ ain1n_p0_18: ain1n_p0_18 {
pinmux = <MAX32_PINMUX(0, 18, AF1)>;
};
/omit-if-no-ref/ spi1_miso_p0_18: spi1_miso_p0_18 {
pinmux = <MAX32_PINMUX(0, 18, AF2)>;
};
/omit-if-no-ref/ tmr0_p0_18: tmr0_p0_18 {
pinmux = <MAX32_PINMUX(0, 18, AF4)>;
};
/omit-if-no-ref/ ain1p_p0_19: ain1p_p0_19 {
pinmux = <MAX32_PINMUX(0, 19, AF1)>;
};
/omit-if-no-ref/ spi1_sck_p0_19: spi1_sck_p0_19 {
pinmux = <MAX32_PINMUX(0, 19, AF2)>;
};
/omit-if-no-ref/ tmr1_p0_19: tmr1_p0_19 {
pinmux = <MAX32_PINMUX(0, 19, AF4)>;
};
/omit-if-no-ref/ ain2n_p0_20: ain2n_p0_20 {
pinmux = <MAX32_PINMUX(0, 20, AF1)>;
};
/omit-if-no-ref/ spi1_sdio2_p0_20: spi1_sdio2_p0_20 {
pinmux = <MAX32_PINMUX(0, 20, AF2)>;
};
/omit-if-no-ref/ uart1_rx_p0_20: uart1_rx_p0_20 {
pinmux = <MAX32_PINMUX(0, 20, AF3)>;
};
/omit-if-no-ref/ tmr2_p0_20: tmr2_p0_20 {
pinmux = <MAX32_PINMUX(0, 20, AF4)>;
};
/omit-if-no-ref/ ain2p_p0_21: ain2p_p0_21 {
pinmux = <MAX32_PINMUX(0, 21, AF1)>;
};
/omit-if-no-ref/ spi1_sdio3_p0_21: spi1_sdio3_p0_21 {
pinmux = <MAX32_PINMUX(0, 21, AF2)>;
};
/omit-if-no-ref/ uart1_tx_p0_21: uart1_tx_p0_21 {
pinmux = <MAX32_PINMUX(0, 21, AF3)>;
};
/omit-if-no-ref/ tmr3_p0_21: tmr3_p0_21 {
pinmux = <MAX32_PINMUX(0, 21, AF4)>;
};
/omit-if-no-ref/ ain3n_p0_22: ain3n_p0_22 {
pinmux = <MAX32_PINMUX(0, 22, AF1)>;
};
/omit-if-no-ref/ spi1_ss1_p0_22: spi1_ss1_p0_22 {
pinmux = <MAX32_PINMUX(0, 22, AF2)>;
};
/omit-if-no-ref/ uart1_cts_p0_22: uart1_cts_p0_22 {
pinmux = <MAX32_PINMUX(0, 22, AF3)>;
};
/omit-if-no-ref/ tmr4_p0_22: tmr4_p0_22 {
pinmux = <MAX32_PINMUX(0, 22, AF4)>;
};
/omit-if-no-ref/ ain3p_p0_23: ain3p_p0_23 {
pinmux = <MAX32_PINMUX(0, 23, AF1)>;
};
/omit-if-no-ref/ spi1_ss2_p0_23: spi1_ss2_p0_23 {
pinmux = <MAX32_PINMUX(0, 23, AF2)>;
};
/omit-if-no-ref/ uart1_rts_p0_23: uart1_rts_p0_23 {
pinmux = <MAX32_PINMUX(0, 23, AF3)>;
};
/omit-if-no-ref/ tmr5_p0_23: tmr5_p0_23 {
pinmux = <MAX32_PINMUX(0, 23, AF4)>;
};
/omit-if-no-ref/ pcm_lrclk_p0_24: pcm_lrclk_p0_24 {
pinmux = <MAX32_PINMUX(0, 24, AF1)>;
};
/omit-if-no-ref/ spi2_ss0_p0_24: spi2_ss0_p0_24 {
pinmux = <MAX32_PINMUX(0, 24, AF2)>;
};
/omit-if-no-ref/ owm_io_p0_24: owm_io_p0_24 {
pinmux = <MAX32_PINMUX(0, 24, AF3)>;
};
/omit-if-no-ref/ tmr0_p0_24: tmr0_p0_24 {
pinmux = <MAX32_PINMUX(0, 24, AF4)>;
};
/omit-if-no-ref/ pcm_dout_p0_25: pcm_dout_p0_25 {
pinmux = <MAX32_PINMUX(0, 25, AF1)>;
};
/omit-if-no-ref/ spi2_mosi_p0_25: spi2_mosi_p0_25 {
pinmux = <MAX32_PINMUX(0, 25, AF2)>;
};
/omit-if-no-ref/ owm_pe_p0_25: owm_pe_p0_25 {
pinmux = <MAX32_PINMUX(0, 25, AF3)>;
};
/omit-if-no-ref/ tmr1_p0_25: tmr1_p0_25 {
pinmux = <MAX32_PINMUX(0, 25, AF4)>;
};
/omit-if-no-ref/ pcm_din_p0_26: pcm_din_p0_26 {
pinmux = <MAX32_PINMUX(0, 26, AF1)>;
};
/omit-if-no-ref/ spi2_miso_p0_26: spi2_miso_p0_26 {
pinmux = <MAX32_PINMUX(0, 26, AF2)>;
};
/omit-if-no-ref/ tmr2_p0_26: tmr2_p0_26 {
pinmux = <MAX32_PINMUX(0, 26, AF4)>;
};
/omit-if-no-ref/ pcm_bclk_p0_27: pcm_bclk_p0_27 {
pinmux = <MAX32_PINMUX(0, 27, AF1)>;
};
/omit-if-no-ref/ spi2_sck_p0_27: spi2_sck_p0_27 {
pinmux = <MAX32_PINMUX(0, 27, AF2)>;
};
/omit-if-no-ref/ tmr3_p0_27: tmr3_p0_27 {
pinmux = <MAX32_PINMUX(0, 27, AF4)>;
};
/omit-if-no-ref/ pdm_data2_p0_28: pdm_data2_p0_28 {
pinmux = <MAX32_PINMUX(0, 28, AF1)>;
};
/omit-if-no-ref/ spi2_sdio2_p0_28: spi2_sdio2_p0_28 {
pinmux = <MAX32_PINMUX(0, 28, AF2)>;
};
/omit-if-no-ref/ uart2_rx_p0_28: uart2_rx_p0_28 {
pinmux = <MAX32_PINMUX(0, 28, AF3)>;
};
/omit-if-no-ref/ tmr4_p0_28: tmr4_p0_28 {
pinmux = <MAX32_PINMUX(0, 28, AF4)>;
};
/omit-if-no-ref/ pdm_data3_p0_29: pdm_data3_p0_29 {
pinmux = <MAX32_PINMUX(0, 29, AF1)>;
};
/omit-if-no-ref/ spi2_sdio3_p0_29: spi2_sdio3_p0_29 {
pinmux = <MAX32_PINMUX(0, 29, AF2)>;
};
/omit-if-no-ref/ uart2_tx_p0_29: uart2_tx_p0_29 {
pinmux = <MAX32_PINMUX(0, 29, AF3)>;
};
/omit-if-no-ref/ tmr5_p0_29: tmr5_p0_29 {
pinmux = <MAX32_PINMUX(0, 29, AF4)>;
};
/omit-if-no-ref/ pdm_rx_clk_p0_30: pdm_rx_clk_p0_30 {
pinmux = <MAX32_PINMUX(0, 30, AF1)>;
};
/omit-if-no-ref/ spi2_ss1_p0_30: spi2_ss1_p0_30 {
pinmux = <MAX32_PINMUX(0, 30, AF2)>;
};
/omit-if-no-ref/ uart2_cts_p0_30: uart2_cts_p0_30 {
pinmux = <MAX32_PINMUX(0, 30, AF3)>;
};
/omit-if-no-ref/ tmr0_p0_30: tmr0_p0_30 {
pinmux = <MAX32_PINMUX(0, 30, AF4)>;
};
/omit-if-no-ref/ pdm_mclk_p0_31: pdm_mclk_p0_31 {
pinmux = <MAX32_PINMUX(0, 31, AF1)>;
};
/omit-if-no-ref/ spi2_ss2_p0_31: spi2_ss2_p0_31 {
pinmux = <MAX32_PINMUX(0, 31, AF2)>;
};
/omit-if-no-ref/ uart2_rts_p0_31: uart2_rts_p0_31 {
pinmux = <MAX32_PINMUX(0, 31, AF3)>;
};
/omit-if-no-ref/ tmr1_p0_31: tmr1_p0_31 {
pinmux = <MAX32_PINMUX(0, 31, AF4)>;
};
/omit-if-no-ref/ sdhc_dat3_p1_0: sdhc_dat3_p1_0 {
pinmux = <MAX32_PINMUX(1, 0, AF1)>;
};
/omit-if-no-ref/ sdma_tms_p1_0: sdma_tms_p1_0 {
pinmux = <MAX32_PINMUX(1, 0, AF3)>;
};
/omit-if-no-ref/ pt0_p1_0: pt0_p1_0 {
pinmux = <MAX32_PINMUX(1, 0, AF4)>;
};
/omit-if-no-ref/ sdhc_cmd_p1_1: sdhc_cmd_p1_1 {
pinmux = <MAX32_PINMUX(1, 1, AF1)>;
};
/omit-if-no-ref/ sdma_tdo_p1_1: sdma_tdo_p1_1 {
pinmux = <MAX32_PINMUX(1, 1, AF3)>;
};
/omit-if-no-ref/ pt1_p1_1: pt1_p1_1 {
pinmux = <MAX32_PINMUX(1, 1, AF4)>;
};
/omit-if-no-ref/ sdhc_dat0_p1_2: sdhc_dat0_p1_2 {
pinmux = <MAX32_PINMUX(1, 2, AF1)>;
};
/omit-if-no-ref/ sdma_tdi_p1_2: sdma_tdi_p1_2 {
pinmux = <MAX32_PINMUX(1, 2, AF3)>;
};
/omit-if-no-ref/ pt2_p1_2: pt2_p1_2 {
pinmux = <MAX32_PINMUX(1, 2, AF4)>;
};
/omit-if-no-ref/ sdhc_clk_p1_3: sdhc_clk_p1_3 {
pinmux = <MAX32_PINMUX(1, 3, AF1)>;
};
/omit-if-no-ref/ sdma_tck_p1_3: sdma_tck_p1_3 {
pinmux = <MAX32_PINMUX(1, 3, AF3)>;
};
/omit-if-no-ref/ pt3_p1_3: pt3_p1_3 {
pinmux = <MAX32_PINMUX(1, 3, AF4)>;
};
/omit-if-no-ref/ sdhc_dat1_p1_4: sdhc_dat1_p1_4 {
pinmux = <MAX32_PINMUX(1, 4, AF1)>;
};
/omit-if-no-ref/ uart0_rx_p1_4: uart0_rx_p1_4 {
pinmux = <MAX32_PINMUX(1, 4, AF3)>;
};
/omit-if-no-ref/ pt5_p1_4: pt5_p1_4 {
pinmux = <MAX32_PINMUX(1, 4, AF4)>;
};
/omit-if-no-ref/ sdhc_dat2_p1_5: sdhc_dat2_p1_5 {
pinmux = <MAX32_PINMUX(1, 5, AF1)>;
};
/omit-if-no-ref/ uart0_tx_p1_5: uart0_tx_p1_5 {
pinmux = <MAX32_PINMUX(1, 5, AF3)>;
};
/omit-if-no-ref/ pt5_p1_5: pt5_p1_5 {
pinmux = <MAX32_PINMUX(1, 5, AF4)>;
};
/omit-if-no-ref/ sdhc_wp_p1_6: sdhc_wp_p1_6 {
pinmux = <MAX32_PINMUX(1, 6, AF1)>;
};
/omit-if-no-ref/ uart0_cts_p1_6: uart0_cts_p1_6 {
pinmux = <MAX32_PINMUX(1, 6, AF3)>;
};
/omit-if-no-ref/ pt6_p1_6: pt6_p1_6 {
pinmux = <MAX32_PINMUX(1, 6, AF4)>;
};
/omit-if-no-ref/ sdhc_cdn_p1_7: sdhc_cdn_p1_7 {
pinmux = <MAX32_PINMUX(1, 7, AF1)>;
};
/omit-if-no-ref/ uart0_rts_p1_7: uart0_rts_p1_7 {
pinmux = <MAX32_PINMUX(1, 7, AF3)>;
};
/omit-if-no-ref/ pt7_p1_7: pt7_p1_7 {
pinmux = <MAX32_PINMUX(1, 7, AF4)>;
};
/omit-if-no-ref/ spi0_ss0_p1_8: spi0_ss0_p1_8 {
pinmux = <MAX32_PINMUX(1, 8, AF1)>;
};
/omit-if-no-ref/ pt8_p1_8: pt8_p1_8 {
pinmux = <MAX32_PINMUX(1, 8, AF4)>;
};
/omit-if-no-ref/ spi0_mosi_p1_9: spi0_mosi_p1_9 {
pinmux = <MAX32_PINMUX(1, 9, AF1)>;
};
/omit-if-no-ref/ pt9_p1_9: pt9_p1_9 {
pinmux = <MAX32_PINMUX(1, 9, AF4)>;
};
/omit-if-no-ref/ spi0_miso_p1_10: spi0_miso_p1_10 {
pinmux = <MAX32_PINMUX(1, 10, AF1)>;
};
/omit-if-no-ref/ pt10_p1_10: pt10_p1_10 {
pinmux = <MAX32_PINMUX(1, 10, AF4)>;
};
/omit-if-no-ref/ spi0_sck_p1_11: spi0_sck_p1_11 {
pinmux = <MAX32_PINMUX(1, 11, AF1)>;
};
/omit-if-no-ref/ pt11_p1_11: pt11_p1_11 {
pinmux = <MAX32_PINMUX(1, 11, AF4)>;
};
/omit-if-no-ref/ spi0_sdio2_p1_12: spi0_sdio2_p1_12 {
pinmux = <MAX32_PINMUX(1, 12, AF1)>;
};
/omit-if-no-ref/ uart1_rx_p1_12: uart1_rx_p1_12 {
pinmux = <MAX32_PINMUX(1, 12, AF3)>;
};
/omit-if-no-ref/ pt12_p1_12: pt12_p1_12 {
pinmux = <MAX32_PINMUX(1, 12, AF4)>;
};
/omit-if-no-ref/ spi0_sdio3_p1_13: spi0_sdio3_p1_13 {
pinmux = <MAX32_PINMUX(1, 13, AF1)>;
};
/omit-if-no-ref/ uart1_tx_p1_13: uart1_tx_p1_13 {
pinmux = <MAX32_PINMUX(1, 13, AF3)>;
};
/omit-if-no-ref/ pt13_p1_13: pt13_p1_13 {
pinmux = <MAX32_PINMUX(1, 13, AF4)>;
};
/omit-if-no-ref/ i2c2_scl_p1_14: i2c2_scl_p1_14 {
pinmux = <MAX32_PINMUX(1, 14, AF1)>;
};
/omit-if-no-ref/ uart1_cts_p1_14: uart1_cts_p1_14 {
pinmux = <MAX32_PINMUX(1, 14, AF3)>;
};
/omit-if-no-ref/ pt14_p1_14: pt14_p1_14 {
pinmux = <MAX32_PINMUX(1, 14, AF4)>;
};
/omit-if-no-ref/ i2c2_sda_p1_15: i2c2_sda_p1_15 {
pinmux = <MAX32_PINMUX(1, 15, AF1)>;
};
/omit-if-no-ref/ uart1_rts_p1_15: uart1_rts_p1_15 {
pinmux = <MAX32_PINMUX(1, 15, AF3)>;
};
/omit-if-no-ref/ pt15_p1_15: pt15_p1_15 {
pinmux = <MAX32_PINMUX(1, 15, AF4)>;
};
};
};
};
/* Low power modes pin state,
* user shall set related configurations like:
* pullup/pulldown, out/in...
* incase of their needs on the their target board
*/
&pinctrl {
/omit-if-no-ref/ spixf_ss0_p0_0_sleep: spixf_ss0_p0_0_sleep {
pinmux = <MAX32_PINMUX(0, 0, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart2_cts_p0_0_sleep: uart2_cts_p0_0_sleep {
pinmux = <MAX32_PINMUX(0, 0, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr0_p0_0_sleep: tmr0_p0_0_sleep {
pinmux = <MAX32_PINMUX(0, 0, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spixf_mosi_p0_1_sleep: spixf_mosi_p0_1_sleep {
pinmux = <MAX32_PINMUX(0, 1, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart2_tx_p0_1_sleep: uart2_tx_p0_1_sleep {
pinmux = <MAX32_PINMUX(0, 1, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr1_p0_1_sleep: tmr1_p0_1_sleep {
pinmux = <MAX32_PINMUX(0, 1, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spixf_miso_p0_2_sleep: spixf_miso_p0_2_sleep {
pinmux = <MAX32_PINMUX(0, 2, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart2_rx_p0_2_sleep: uart2_rx_p0_2_sleep {
pinmux = <MAX32_PINMUX(0, 2, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr2_p0_2_sleep: tmr2_p0_2_sleep {
pinmux = <MAX32_PINMUX(0, 2, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spixf_sck_p0_3_sleep: spixf_sck_p0_3_sleep {
pinmux = <MAX32_PINMUX(0, 3, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart2_rts_p0_3_sleep: uart2_rts_p0_3_sleep {
pinmux = <MAX32_PINMUX(0, 3, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr3_p0_3_sleep: tmr3_p0_3_sleep {
pinmux = <MAX32_PINMUX(0, 3, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spixf_sdio2_p0_4_sleep: spixf_sdio2_p0_4_sleep {
pinmux = <MAX32_PINMUX(0, 4, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ owm_io_p0_4_sleep: owm_io_p0_4_sleep {
pinmux = <MAX32_PINMUX(0, 4, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr4_p0_4_sleep: tmr4_p0_4_sleep {
pinmux = <MAX32_PINMUX(0, 4, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spixf_sdio3_p0_5_sleep: spixf_sdio3_p0_5_sleep {
pinmux = <MAX32_PINMUX(0, 5, AF1)>;
low-power-enable;
};
/omit-if-no-ref/owm_pe_p0_5_sleep: owm_pe_p0_5_sleep {
pinmux = <MAX32_PINMUX(0, 5, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr5_p0_5_sleep: tmr5_p0_5_sleep {
pinmux = <MAX32_PINMUX(0, 5, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ i2c0_scl_p0_6_sleep: i2c0_scl_p0_6_sleep {
pinmux = <MAX32_PINMUX(0, 6, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ swdio2_p0_6_sleep: swdio2_p0_6_sleep {
pinmux = <MAX32_PINMUX(0, 6, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr0_p0_6_sleep: tmr0_p0_6_sleep {
pinmux = <MAX32_PINMUX(0, 6, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ i2c0_sda_p0_7_sleep: i2c0_sda_p0_7_sleep {
pinmux = <MAX32_PINMUX(0, 7, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ swclk2_p0_7_sleep: swclck2_p0_7_sleep {
pinmux = <MAX32_PINMUX(0, 7, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr1_p0_7_sleep: tmr1_p0_7_sleep {
pinmux = <MAX32_PINMUX(0, 7, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spixr_ss0_p0_8_sleep: spixr_ss0_p0_8_sleep {
pinmux = <MAX32_PINMUX(0, 8, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_ss0_p0_8_sleep: spi0_ss0_p0_8_sleep {
pinmux = <MAX32_PINMUX(0, 8, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart0_cts_p0_8_sleep: uart0_cts_p0_8_sleep {
pinmux = <MAX32_PINMUX(0, 8, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr2_p0_8_sleep: tmr2_p0_8_sleep {
pinmux = <MAX32_PINMUX(0, 8, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spixr_mosi_p0_9_sleep: spixr_mosi_p0_9_sleep {
pinmux = <MAX32_PINMUX(0, 9, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_mosi_p0_9_sleep: spi0_mosi_p0_9_sleep {
pinmux = <MAX32_PINMUX(0, 9, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart0_tx_p0_9_sleep: uart0_tx_p0_9_sleep {
pinmux = <MAX32_PINMUX(0, 9, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr3_p0_9_sleep: tmr3_p0_9_sleep {
pinmux = <MAX32_PINMUX(0, 9, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spixr_miso_p0_10_sleep: spixr_miso_p0_10_sleep {
pinmux = <MAX32_PINMUX(0, 10, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_miso_p0_10_sleep: spi0_miso_p0_10_sleep {
pinmux = <MAX32_PINMUX(0, 10, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart0_rx_p0_10_sleep: uart0_rx_p0_10_sleep {
pinmux = <MAX32_PINMUX(0, 10, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr4_p0_10_sleep: tmr4_p0_10_sleep {
pinmux = <MAX32_PINMUX(0, 10, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spixr_sck_p0_11_sleep: spixr_sck_p0_11_sleep {
pinmux = <MAX32_PINMUX(0, 11, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_sck_p0_11_sleep: spi0_sck_p0_11_sleep {
pinmux = <MAX32_PINMUX(0, 11, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart0_rts_p0_11_sleep: uart0_rts_p0_11_sleep {
pinmux = <MAX32_PINMUX(0, 11, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr5_p0_11_sleep: tmr5_p0_11_sleep {
pinmux = <MAX32_PINMUX(0, 11, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spixr_sdio2_p0_12_sleep: spixr_sdio2_p0_12_sleep {
pinmux = <MAX32_PINMUX(0, 12, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_sdio2_p0_12_sleep: spi0_sdio2_p0_12_sleep {
pinmux = <MAX32_PINMUX(0, 12, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ owm_io_p0_12_sleep: owm_io_p0_12_sleep {
pinmux = <MAX32_PINMUX(0, 12, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr0_p0_12_sleep: tmr0_p0_12_sleep {
pinmux = <MAX32_PINMUX(0, 12, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spixr_sdio3_p0_13_sleep: spixr_sdio3_p0_13_sleep {
pinmux = <MAX32_PINMUX(0, 13, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_sdio3_p0_13_sleep: spi0_sdio3_p0_13_sleep {
pinmux = <MAX32_PINMUX(0, 13, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ owm_pe_p0_13_sleep: owm_pe_p0_13_sleep {
pinmux = <MAX32_PINMUX(0, 13, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr1_p0_13_sleep: tmr1_p0_13_sleep {
pinmux = <MAX32_PINMUX(0, 13, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ i2c1_scl_p0_14_sleep: i2c1_scl_p0_14_sleep {
pinmux = <MAX32_PINMUX(0, 14, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_ss1_p0_14_sleep: spi0_ss1_p0_14_sleep {
pinmux = <MAX32_PINMUX(0, 14, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ tmr2_p0_14_sleep: tmr2_p0_14_sleep {
pinmux = <MAX32_PINMUX(0, 14, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ i2c1_sda_p0_15_sleep: i2c1_sda_p0_15_sleep {
pinmux = <MAX32_PINMUX(0, 15, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_ss2_p0_15_sleep: spi0_ss2_p0_15_sleep {
pinmux = <MAX32_PINMUX(0, 15, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ tmr3_p0_15_sleep: tmr3_p0_15_sleep {
pinmux = <MAX32_PINMUX(0, 15, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ ain0n_p0_16_sleep: ain0n_p0_16_sleep {
pinmux = <MAX32_PINMUX(0, 16, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi1_ss0_p0_16_sleep: spi1_ss0_p0_16_sleep {
pinmux = <MAX32_PINMUX(0, 16, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ owm_io_p0_16_sleep: owm_io_p0_16_sleep {
pinmux = <MAX32_PINMUX(0, 16, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr4_p0_16_sleep: tmr4_p0_16_sleep {
pinmux = <MAX32_PINMUX(0, 16, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ ain0p_p0_17_sleep: ain0p_p0_17_sleep {
pinmux = <MAX32_PINMUX(0, 17, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi1_mosi_p0_17_sleep: spi1_mosi_p0_17_sleep {
pinmux = <MAX32_PINMUX(0, 17, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ owm_pe_p0_17_sleep: owm_pe_p0_17_sleep {
pinmux = <MAX32_PINMUX(0, 17, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr5_p0_17_sleep: tmr5_p0_17_sleep {
pinmux = <MAX32_PINMUX(0, 17, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ ain1n_p0_18_sleep: ain1n_p0_18_sleep {
pinmux = <MAX32_PINMUX(0, 18, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi1_miso_p0_18_sleep: spi1_miso_p0_18_sleep {
pinmux = <MAX32_PINMUX(0, 18, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ tmr0_p0_18_sleep: tmr0_p0_18_sleep {
pinmux = <MAX32_PINMUX(0, 18, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ ain1p_p0_19_sleep: ain1p_p0_19_sleep {
pinmux = <MAX32_PINMUX(0, 19, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi1_sck_p0_19_sleep: spi1_sck_p0_19_sleep {
pinmux = <MAX32_PINMUX(0, 19, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ tmr1_p0_19_sleep: tmr1_p0_19_sleep {
pinmux = <MAX32_PINMUX(0, 19, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ ain2n_p0_20_sleep: ain2n_p0_20_sleep {
pinmux = <MAX32_PINMUX(0, 20, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi1_sdio2_p0_20_sleep: spi1_sdio2_p0_20_sleep {
pinmux = <MAX32_PINMUX(0, 20, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart1_rx_p0_20_sleep: uart1_rx_p0_20_sleep {
pinmux = <MAX32_PINMUX(0, 20, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr2_p0_20_sleep: tmr2_p0_20_sleep {
pinmux = <MAX32_PINMUX(0, 20, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ ain2p_p0_21_sleep: ain2p_p0_21_sleep {
pinmux = <MAX32_PINMUX(0, 21, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi1_sdio3_p0_21_sleep: spi1_sdio3_p0_21_sleep {
pinmux = <MAX32_PINMUX(0, 21, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart1_tx_p0_21_sleep: uart1_tx_p0_21_sleep {
pinmux = <MAX32_PINMUX(0, 21, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr3_p0_21_sleep: tmr3_p0_21_sleep {
pinmux = <MAX32_PINMUX(0, 21, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ ain3n_p0_22_sleep: ain3n_p0_22_sleep {
pinmux = <MAX32_PINMUX(0, 22, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi1_ss1_p0_22_sleep: spi1_ss1_p0_22_sleep {
pinmux = <MAX32_PINMUX(0, 22, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart1_cts_p0_22_sleep: uart1_cts_p0_22_sleep {
pinmux = <MAX32_PINMUX(0, 22, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr4_p0_22_sleep: tmr4_p0_22_sleep {
pinmux = <MAX32_PINMUX(0, 22, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ ain3p_p0_23_sleep: ain3p_p0_23_sleep {
pinmux = <MAX32_PINMUX(0, 23, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi1_ss2_p0_23_sleep: spi1_ss2_p0_23_sleep {
pinmux = <MAX32_PINMUX(0, 23, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart1_rts_p0_23_sleep: uart1_rts_p0_23_sleep {
pinmux = <MAX32_PINMUX(0, 23, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr5_p0_23_sleep: tmr5_p0_23_sleep {
pinmux = <MAX32_PINMUX(0, 23, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ pcm_lrclk_p0_24_sleep: pcm_lrclk_p0_24_sleep {
pinmux = <MAX32_PINMUX(0, 24, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi2_ss0_p0_24_sleep: spi2_ss0_p0_24_sleep {
pinmux = <MAX32_PINMUX(0, 24, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ owm_io_p0_24_sleep: owm_io_p0_24_sleep {
pinmux = <MAX32_PINMUX(0, 24, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr0_p0_24_sleep: tmr0_p0_24_sleep {
pinmux = <MAX32_PINMUX(0, 24, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ pcm_dout_p0_25_sleep: pcm_dout_p0_25_sleep {
pinmux = <MAX32_PINMUX(0, 25, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi2_mosi_p0_25_sleep: spi2_mosi_p0_25_sleep {
pinmux = <MAX32_PINMUX(0, 25, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ owm_pe_p0_25_sleep: owm_pe_p0_25_sleep {
pinmux = <MAX32_PINMUX(0, 25, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr1_p0_25_sleep: tmr1_p0_25_sleep {
pinmux = <MAX32_PINMUX(0, 25, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ pcm_din_p0_26_sleep: pcm_din_p0_26_sleep {
pinmux = <MAX32_PINMUX(0, 26, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi2_miso_p0_26_sleep: spi2_miso_p0_26_sleep {
pinmux = <MAX32_PINMUX(0, 26, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ tmr2_p0_26_sleep: tmr2_p0_26_sleep {
pinmux = <MAX32_PINMUX(0, 26, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ pcm_bclk_p0_27_sleep: pcm_bclk_p0_27_sleep {
pinmux = <MAX32_PINMUX(0, 27, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi2_sck_p0_27_sleep: spi2_sck_p0_27_sleep {
pinmux = <MAX32_PINMUX(0, 27, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ tmr3_p0_27_sleep: tmr3_p0_27_sleep {
pinmux = <MAX32_PINMUX(0, 27, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ pdm_data2_p0_28_sleep: pdm_data2_p0_28_sleep {
pinmux = <MAX32_PINMUX(0, 28, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi2_sdio2_p0_28_sleep: spi2_sdio2_p0_28_sleep {
pinmux = <MAX32_PINMUX(0, 28, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart2_rx_p0_28_sleep: uart2_rx_p0_28_sleep {
pinmux = <MAX32_PINMUX(0, 28, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr4_p0_28_sleep: tmr4_p0_28_sleep {
pinmux = <MAX32_PINMUX(0, 28, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ pdm_data3_p0_29_sleep: pdm_data3_p0_29_sleep {
pinmux = <MAX32_PINMUX(0, 29, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi2_sdio3_p0_29_sleep: spi2_sdio3_p0_29_sleep {
pinmux = <MAX32_PINMUX(0, 29, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart2_tx_p0_29_sleep: uart2_tx_p0_29_sleep {
pinmux = <MAX32_PINMUX(0, 29, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr5_p0_29_sleep: tmr5_p0_29_sleep {
pinmux = <MAX32_PINMUX(0, 29, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ pdm_rx_clk_p0_30_sleep: pdm_rx_clk_p0_30_sleep {
pinmux = <MAX32_PINMUX(0, 30, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi2_ss1_p0_30_sleep: spi2_ss1_p0_30_sleep {
pinmux = <MAX32_PINMUX(0, 30, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart2_cts_p0_30_sleep: uart2_cts_p0_30_sleep {
pinmux = <MAX32_PINMUX(0, 30, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr0_p0_30_sleep: tmr0_p0_30_sleep {
pinmux = <MAX32_PINMUX(0, 30, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ pdm_mclk_p0_31_sleep: pdm_mclk_p0_31_sleep {
pinmux = <MAX32_PINMUX(0, 31, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ spi2_ss2_p0_31_sleep: spi2_ss2_p0_31_sleep {
pinmux = <MAX32_PINMUX(0, 31, AF2)>;
low-power-enable;
};
/omit-if-no-ref/ uart2_rts_p0_31_sleep: uart2_rts_p0_31_sleep {
pinmux = <MAX32_PINMUX(0, 31, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ tmr1_p0_31_sleep: tmr1_p0_31_sleep {
pinmux = <MAX32_PINMUX(0, 31, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ sdhc_dat3_p1_0_sleep: sdhc_dat3_p1_0_sleep {
pinmux = <MAX32_PINMUX(1, 0, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ sdma_tms_p1_0_sleep: sdma_tms_p1_0_sleep {
pinmux = <MAX32_PINMUX(1, 0, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt0_p1_0_sleep: pt0_p1_0_sleep {
pinmux = <MAX32_PINMUX(1, 0, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ sdhc_cmd_p1_1_sleep: sdhc_cmd_p1_1_sleep {
pinmux = <MAX32_PINMUX(1, 1, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ sdma_tdo_p1_1_sleep: sdma_tdo_p1_1_sleep {
pinmux = <MAX32_PINMUX(1, 1, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt1_p1_1_sleep: pt1_p1_1_sleep {
pinmux = <MAX32_PINMUX(1, 1, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ sdhc_dat0_p1_2_sleep: sdhc_dat0_p1_2_sleep {
pinmux = <MAX32_PINMUX(1, 2, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ sdma_tdi_p1_2_sleep: sdma_tdi_p1_2_sleep {
pinmux = <MAX32_PINMUX(1, 2, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt2_p1_2_sleep: pt2_p1_2_sleep {
pinmux = <MAX32_PINMUX(1, 2, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ sdhc_clk_p1_3_sleep: sdhc_clk_p1_3_sleep {
pinmux = <MAX32_PINMUX(1, 3, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ sdma_tck_p1_3_sleep: sdma_tck_p1_3_sleep {
pinmux = <MAX32_PINMUX(1, 3, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt3_p1_3_sleep: pt3_p1_3_sleep {
pinmux = <MAX32_PINMUX(1, 3, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ sdhc_dat1_p1_4_sleep: sdhc_dat1_p1_4_sleep {
pinmux = <MAX32_PINMUX(1, 4, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart0_rx_p1_4_sleep: uart0_rx_p1_4_sleep {
pinmux = <MAX32_PINMUX(1, 4, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt5_p1_4_sleep: pt5_p1_4_sleep {
pinmux = <MAX32_PINMUX(1, 4, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ sdhc_dat2_p1_5_sleep: sdhc_dat2_p1_5_sleep {
pinmux = <MAX32_PINMUX(1, 5, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart0_tx_p1_5_sleep: uart0_tx_p1_5_sleep {
pinmux = <MAX32_PINMUX(1, 5, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt5_p1_5_sleep: pt5_p1_5_sleep {
pinmux = <MAX32_PINMUX(1, 5, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ sdhc_wp_p1_6_sleep: sdhc_wp_p1_6_sleep {
pinmux = <MAX32_PINMUX(1, 6, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart0_cts_p1_6_sleep: uart0_cts_p1_6_sleep {
pinmux = <MAX32_PINMUX(1, 6, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt6_p1_6_sleep: pt6_p1_6_sleep {
pinmux = <MAX32_PINMUX(1, 6, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ sdhc_cdn_p1_7_sleep: sdhc_cdn_p1_7_sleep {
pinmux = <MAX32_PINMUX(1, 7, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart0_rts_p1_7_sleep: uart0_rts_p1_7_sleep {
pinmux = <MAX32_PINMUX(1, 7, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt7_p1_7_sleep: pt7_p1_7_sleep {
pinmux = <MAX32_PINMUX(1, 7, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_ss0_p1_8_sleep: spi0_ss0_p1_8_sleep {
pinmux = <MAX32_PINMUX(1, 8, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ pt8_p1_8_sleep: pt8_p1_8_sleep {
pinmux = <MAX32_PINMUX(1, 8, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_mosi_p1_9_sleep: spi0_mosi_p1_9_sleep {
pinmux = <MAX32_PINMUX(1, 9, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ pt9_p1_9_sleep: pt9_p1_9_sleep {
pinmux = <MAX32_PINMUX(1, 9, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_miso_p1_10_sleep: spi0_miso_p1_10_sleep {
pinmux = <MAX32_PINMUX(1, 10, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ pt10_p1_10_sleep: pt10_p1_10_sleep {
pinmux = <MAX32_PINMUX(1, 10, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_sck_p1_11_sleep: spi0_sck_p1_11_sleep {
pinmux = <MAX32_PINMUX(1, 11, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ pt11_p1_11_sleep: pt11_p1_11_sleep {
pinmux = <MAX32_PINMUX(1, 11, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_sdio2_p1_12_sleep: spi0_sdio2_p1_12_sleep {
pinmux = <MAX32_PINMUX(1, 12, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart1_rx_p1_12_sleep: uart1_rx_p1_12_sleep {
pinmux = <MAX32_PINMUX(1, 12, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt12_p1_12_sleep: pt12_p1_12_sleep {
pinmux = <MAX32_PINMUX(1, 12, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ spi0_sdio3_p1_13_sleep: spi0_sdio3_p1_13_sleep {
pinmux = <MAX32_PINMUX(1, 13, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart1_tx_p1_13_sleep: uart1_tx_p1_13_sleep {
pinmux = <MAX32_PINMUX(1, 13, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt13_p1_13_sleep: pt13_p1_13_sleep {
pinmux = <MAX32_PINMUX(1, 13, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ i2c2_scl_p1_14_sleep: i2c2_scl_p1_14_sleep {
pinmux = <MAX32_PINMUX(1, 14, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart1_cts_p1_14_sleep: uart1_cts_p1_14_sleep {
pinmux = <MAX32_PINMUX(1, 14, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt14_p1_14_sleep: pt14_p1_14_sleep {
pinmux = <MAX32_PINMUX(1, 14, AF4)>;
low-power-enable;
};
/omit-if-no-ref/ i2c2_sda_p1_15_sleep: i2c2_sda_p1_15_sleep {
pinmux = <MAX32_PINMUX(1, 15, AF1)>;
low-power-enable;
};
/omit-if-no-ref/ uart1_rts_p1_15_sleep: uart1_rts_p1_15_sleep {
pinmux = <MAX32_PINMUX(1, 15, AF3)>;
low-power-enable;
};
/omit-if-no-ref/ pt15_p1_15_sleep: pt15_p1_15_sleep {
pinmux = <MAX32_PINMUX(1, 15, AF4)>;
low-power-enable;
};
};
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