Flavio Ceolin 48c6548d6a x86: core: Remove extra parenthesis ... Extra parenthis was raising a warning when building using Clang/llvm Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>		2019-03-06 22:40:25 -05:00
..
arc	userspace: fix x86 issue with adding partitions	2019-03-03 23:44:13 -05:00
arm	arch: arm: fix thread and interrupt stack start calculations	2019-03-05 08:26:40 -05:00
common	gen_isr_tables: Fix _sw_isr_table generation for multi-level IRQs	2019-02-06 10:13:25 -05:00
nios2	arch: Add 'U' to unsigned variable assignments	2018-12-04 22:51:56 -05:00
posix	tracing: POSIX arch: Trace switch to main thread	2019-02-14 15:41:19 -05:00
riscv32	arch: riscv32: Fix trivial comment	2019-01-31 07:40:24 -05:00
x86	x86: core: Remove extra parenthesis	2019-03-06 22:40:25 -05:00
x86_64	kconfig: Remove redundant 'default n' properties	2019-02-27 09:25:22 +01:00
xtensa	boards: intel_s1000_crb: fix setting cache attributes	2019-02-15 16:21:50 -05:00
CMakeLists.txt	Build: Added support for out-of-tree Arch	2019-02-07 17:00:43 -05:00
Kconfig	arch: minor white-space fix in Kconfig	2019-02-28 11:57:25 -08:00