zephyr/soc
Andrei Gansari 487dc7cb94 soc: enable secure mode for LPC55xxx
Devices that are SECURE enabled may require sometimes to enable secure
bits on CMSE register.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2019-12-10 08:48:56 -06:00
..
arc include: Fix use of <misc/FOO.h> -> <sys/FOO.h> 2019-12-10 08:39:37 -05:00
arm soc: enable secure mode for LPC55xxx 2019-12-10 08:48:56 -06:00
nios2 drivers: gpio: remove altera gpio driver 2019-11-06 10:56:41 -05:00
posix kernel: rename z_arch_ to arch_ 2019-11-07 15:21:46 -08:00
riscv kconfig: Rename USE_CODE_PARTITION to USE_DT_CODE_PARTITION 2019-12-09 16:40:24 -05:00
x86 soc: x86: apollo_lake: Turn .rst doc into .txt 2019-12-06 16:56:24 +01:00
xtensa soc: intel_s1000_crb: fix XCC build error with newlib 2019-12-02 09:58:00 -05:00
Kconfig riscv32: rename to riscv 2019-08-02 13:54:48 -07:00