46aa6717ff
Mostly a revert of commit b1def7145f ("arch: deprecate `_current`").
This commit was part of PR #80716 whose initial purpose was about providing
an architecture specific optimization for _current. The actual deprecation
was sneaked in later on without proper discussion.
The Zephyr core always used _current before and that was fine. It is quite
prevalent as well and the alternative is proving rather verbose.
Furthermore, as a concept, the "current thread" is not something that is
necessarily architecture specific. Therefore the primary abstraction
should not carry the arch_ prefix.
Hence this revert.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
139 lines
3.4 KiB
C
139 lines
3.4 KiB
C
/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Include esp-idf headers first to avoid redefining BIT() macro */
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#include <soc.h>
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#include <soc/rtc_cntl_reg.h>
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#include <soc/timer_group_reg.h>
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#include <zephyr/drivers/interrupt_controller/intc_esp32.h>
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#include <xtensa/config/core-isa.h>
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#include <xtensa/corebits.h>
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#include <esp_private/spi_flash_os.h>
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#include <esp_private/esp_mmu_map_private.h>
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#include <esp_flash_internal.h>
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#if CONFIG_ESP_SPIRAM
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#include "psram.h"
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#endif
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#include <zephyr/kernel_structs.h>
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#include <string.h>
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#include <zephyr/toolchain.h>
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#include <zephyr/types.h>
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#include <zephyr/linker/linker-defs.h>
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#include <kernel_internal.h>
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#include <esp_private/system_internal.h>
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#include <esp32/rom/cache.h>
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#include <esp_cpu.h>
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#include <hal/soc_hal.h>
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#include <hal/cpu_hal.h>
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#include <soc/gpio_periph.h>
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#include <esp_err.h>
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#include <esp_timer.h>
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#include <hal/wdt_hal.h>
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#include <esp_app_format.h>
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#ifndef CONFIG_SOC_ENABLE_APPCPU
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#include "esp_clk_internal.h"
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#endif /* CONFIG_SOC_ENABLE_APPCPU */
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#include <zephyr/sys/printk.h>
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#include "esp_log.h"
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#define TAG "boot.esp32"
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extern void z_prep_c(void);
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extern void esp_reset_reason_init(void);
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extern int esp_appcpu_init(void);
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/*
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* This is written in C rather than assembly since, during the port bring up,
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* Zephyr is being booted by the Espressif bootloader. With it, the C stack
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* is already set up.
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*/
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void IRAM_ATTR __esp_platform_start(void)
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{
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extern uint32_t _init_start;
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/* Move the exception vector table to IRAM. */
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__asm__ __volatile__ ("wsr %0, vecbase" : : "r"(&_init_start));
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z_bss_zero();
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__asm__ __volatile__ ("" : : "g"(&__bss_start) : "memory");
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/* Disable normal interrupts. */
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__asm__ __volatile__ ("wsr %0, PS" : : "r"(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE));
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/* Initialize the architecture CPU pointer. Some of the
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* initialization code wants a valid _current before
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* z_prep_c() is invoked.
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*/
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__asm__ __volatile__("wsr.MISC0 %0; rsync" : : "r"(&_kernel.cpus[0]));
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esp_reset_reason_init();
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#ifndef CONFIG_MCUBOOT
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/* ESP-IDF/MCUboot 2nd stage bootloader enables RTC WDT to check
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* on startup sequence related issues in application. Hence disable that
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* as we are about to start Zephyr environment.
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*/
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wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL};
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wdt_hal_write_protect_disable(&rtc_wdt_ctx);
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wdt_hal_disable(&rtc_wdt_ctx);
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wdt_hal_write_protect_enable(&rtc_wdt_ctx);
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esp_timer_early_init();
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esp_mspi_pin_init();
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esp_flash_app_init();
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esp_mmu_map_init();
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#if CONFIG_ESP_SPIRAM
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esp_init_psram();
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#endif /* CONFIG_ESP_SPIRAM */
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#endif /* !CONFIG_MCUBOOT */
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esp_intr_initialize();
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#if CONFIG_ESP_SPIRAM
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/* Init Shared Multi Heap for PSRAM */
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int err = esp_psram_smh_init();
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if (err) {
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printk("Failed to initialize PSRAM shared multi heap (%d)\n", err);
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}
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#endif
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/* Start Zephyr */
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z_prep_c();
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CODE_UNREACHABLE;
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}
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/* Boot-time static default printk handler, possibly to be overridden later. */
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int IRAM_ATTR arch_printk_char_out(int c)
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{
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if (c == '\n') {
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esp_rom_uart_tx_one_char('\r');
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}
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esp_rom_uart_tx_one_char(c);
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return 0;
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}
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void sys_arch_reboot(int type)
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{
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esp_restart_noos();
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}
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#if defined(CONFIG_SOC_ENABLE_APPCPU) && !defined(CONFIG_MCUBOOT)
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extern int esp_appcpu_init(void);
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SYS_INIT(esp_appcpu_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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#endif
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