662b0bf765
Modern hardware all supports a TSC_DEADLINE mode for the APIC timer, where the same GHz-scale 64 bit TSC used for performance monitoring becomes the free-running counter used for cpu-local timer interrupts. Being a free running counter that does not need to be reset, it will not lose time in an interrupt. Being 64 bit, it needs no rollover or clamping logic in the driver when presented with a 32 bit tick count. Being a proper comparator, it will correctly trigger interrupts for times set "in the past" and thus needs no minimum/clamping logic. The counter is synchronized across the system architecturally (modulo one burp where firmware likes to change the adjustment value) so usage is SMP-safe by default. Access to the 64 bit counter and comparator value are single-instruction atomics even on 32 bit systems, so it beats even the RISC-V machine timer in complexity (which was our reigning champ for "simplest timer driver"). Really this is just ideal for Zephyr. So rather than try to add support for it to the existing APIC driver and increase complexity, make this a new standalone driver instead. All modern hardware has what it needs. The sole gotcha is that it's not easily emulatable (qemu supports it only under kvm where they can freeload on the host TSC) so it can be exercised only on hardware platforms right now. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
400 lines
12 KiB
Text
400 lines
12 KiB
Text
# Timer driver configuration options
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# Copyright (c) 2014-2015 Wind River Systems, Inc.
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# Copyright (c) 2016 Cadence Design Systems, Inc.
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# Copyright (c) 2019 Intel Corp.
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# SPDX-License-Identifier: Apache-2.0
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menu "Timer Drivers"
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menuconfig APIC_TIMER
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bool "New local APIC timer"
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depends on X86
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depends on LOAPIC
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select TICKLESS_CAPABLE
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help
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Use the x86 local APIC in one-shot mode as the system time
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source. NOTE: this probably isn't what you want except on
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older or idiosyncratic hardware (or environments like qemu
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without complete APIC emulation). Modern hardware will work
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better with CONFIG_APIC_TSC_DEADLINE_TIMER.
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if APIC_TIMER
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config APIC_TIMER_IRQ
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int "Local APIC timer IRQ"
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default 24
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help
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This option specifies the IRQ used by the local APIC timer.
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Note: this MUST be set to the index immediately after the
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last IO-APIC IRQ (the timer is the first entry in the APIC
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local vector table). This footgun is not intended to be
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user-configurable and almost certainly should be managed via
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a different mechanism.
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config APIC_TIMER_TSC
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bool "Use invariant TSC for sys_clock_cycle_get_32()"
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help
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If your CPU supports invariant TSC, and you know the ratio of the
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TSC frequency to CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC (the local APIC
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timer frequency), then enable this for a much faster and more
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accurate sys_clock_cycle_get_32().
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if APIC_TIMER_TSC
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config APIC_TIMER_TSC_N
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int "TSC to local APIC timer frequency multiplier (N)"
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default 1
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config APIC_TIMER_TSC_M
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int "TSC to local APIC timer frequency divisor (M)"
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default 1
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endif # APIC_TIMER_TSC
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endif # APIC_TIMER
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config APIC_TIMER_IRQ_PRIORITY
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int "Local APIC timer interrupt priority"
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default 4
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help
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This option specifies the interrupt priority used by the
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local APIC timer.
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config APIC_TSC_DEADLINE_TIMER
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bool "Even newer APIC timer using TSC deadline mode"
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depends on X86
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select LOAPIC
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select TICKLESS_CAPABLE
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help
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Extremely simple timer driver based the local APIC TSC
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deadline capability. The use of a free-running 64 bit
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counter with comparator eliminates almost all edge cases
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from the handling, and the near-instruction-cycle resolution
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permits effectively unlimited precision where needed (the
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limit becomes the CPU time taken to execute the timing
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logic). SMP-safe and very fast, this should be the obvious
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choice for any x86 device with invariant TSC and TSC
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deadline capability.
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config HPET_TIMER
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bool "HPET timer"
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depends on X86
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select IOAPIC if X86
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select LOAPIC if X86
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select TIMER_READS_ITS_FREQUENCY_AT_RUNTIME
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select TICKLESS_CAPABLE
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help
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This option selects High Precision Event Timer (HPET) as a
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system timer.
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menuconfig ARCV2_TIMER
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bool "ARC Timer"
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default y
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depends on ARC
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the ARCv2 processor timer 0
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and provides the standard "system clock driver" interfaces.
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config ARCV2_TIMER_IRQ_PRIORITY
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int "ARC timer interrupt priority"
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default 0
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depends on ARCV2_TIMER
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help
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This option specifies the IRQ priority used by the ARC timer. Lower
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values have higher priority.
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config ARM_ARCH_TIMER
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bool "ARM architected timer"
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depends on GIC
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select ARCH_HAS_CUSTOM_BUSY_WAIT
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the ARM architected
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timer which provides per-cpu timers attached to a GIC to deliver its
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per-processor interrupts via PPIs.
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DT_COMPAT_ARM_V6M_SYSTICK := arm,armv6m-systick
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DT_COMPAT_ARM_V7M_SYSTICK := arm,armv7m-systick
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DT_COMPAT_ARM_V8M_SYSTICK := arm,armv8m-systick
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DT_COMPAT_ARM_V8_1M_SYSTICK := arm,armv8.1m-systick
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config CORTEX_M_SYSTICK
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bool "Cortex-M SYSTICK timer"
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depends on CPU_CORTEX_M_HAS_SYSTICK
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default $(dt_compat_enabled,$(DT_COMPAT_ARM_V6M_SYSTICK)) || \
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$(dt_compat_enabled,$(DT_COMPAT_ARM_V7M_SYSTICK)) || \
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$(dt_compat_enabled,$(DT_COMPAT_ARM_V8M_SYSTICK)) || \
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$(dt_compat_enabled,$(DT_COMPAT_ARM_V8_1M_SYSTICK))
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the Cortex-M processor
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SYSTICK timer and provides the standard "system clock driver" interfaces.
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config ALTERA_AVALON_TIMER
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bool "Altera Avalon Interval Timer"
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default y
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depends on NIOS2
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help
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This module implements a kernel device driver for the Altera Avalon
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Interval Timer as described in the Embedded IP documentation, for use
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with Nios II and possibly other Altera soft CPUs. It provides the
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standard "system clock driver" interfaces.
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config ITE_IT8XXX2_TIMER
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bool "ITE it8xxx2 timer driver"
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depends on SOC_IT8XXX2
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the ITE it8xxx2
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HW timer model
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config NRF_RTC_TIMER
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bool "nRF Real Time Counter (NRF_RTC1) Timer"
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depends on CLOCK_CONTROL
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depends on SOC_COMPATIBLE_NRF
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select TICKLESS_CAPABLE
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select NRF_HW_RTC1_RESERVED
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help
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This module implements a kernel device driver for the nRF Real Time
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Counter NRF_RTC1 and provides the standard "system clock driver"
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interfaces.
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if NRF_RTC_TIMER
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config NRF_RTC_TIMER_USER_CHAN_COUNT
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int "Additional channels that can be used"
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default 0
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help
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Use nrf_rtc_timer.h API. Driver is not managing allocation of channels.
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choice
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prompt "Clock startup policy"
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default SYSTEM_CLOCK_WAIT_FOR_STABILITY
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config SYSTEM_CLOCK_NO_WAIT
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bool "No wait"
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help
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System clock source is initiated but does not wait for clock readiness.
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When this option is picked, system clock may not be ready when code relying
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on kernel API is executed. Requested timeouts will be prolonged by the
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remaining startup time.
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config SYSTEM_CLOCK_WAIT_FOR_AVAILABILITY
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bool "Wait for availability"
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help
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System clock source initialization waits until clock is available. In some
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systems, clock initially runs from less accurate source which has faster
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startup time and then seamlessly switches to the target clock source when
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it is ready. When this option is picked, system clock is available after
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system clock driver initialization but it may be less accurate. Option is
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equivalent to waiting for stability if clock source does not have
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intermediate state.
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config SYSTEM_CLOCK_WAIT_FOR_STABILITY
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bool "Wait for stability"
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help
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System clock source initialization waits until clock is stable. When this
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option is picked, system clock is available and stable after system clock
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driver initialization.
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endchoice
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endif # NRF_RTC_TIMER
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source "drivers/timer/Kconfig.stm32_lptim"
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config RISCV_MACHINE_TIMER
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bool "RISCV Machine Timer"
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depends on SOC_FAMILY_RISCV_PRIVILEGE
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the generic RISCV machine
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timer driver. It provides the standard "system clock driver" interfaces.
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config RV32M1_LPTMR_TIMER
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bool "RV32M1 LPTMR system timer driver"
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default y
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depends on SOC_OPENISA_RV32M1_RISCV32
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depends on RV32M1_INTMUX
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help
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This module implements a kernel device driver for using the LPTMR
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peripheral as the system clock. It provides the standard "system clock
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driver" interfaces.
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config LITEX_TIMER
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bool "LiteX Timer"
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default y
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depends on SOC_RISCV32_LITEX_VEXRISCV
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help
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This module implements a kernel device driver for LiteX Timer.
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config NATIVE_POSIX_TIMER
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bool "(POSIX) native_posix timer driver"
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default y
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depends on BOARD_NATIVE_POSIX
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the native_posix HW timer
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model
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config XTENSA_TIMER
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bool "Xtensa timer support"
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depends on XTENSA
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default y
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select TICKLESS_CAPABLE
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help
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Enables a system timer driver for Xtensa based on the CCOUNT
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and CCOMPARE special registers.
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config XTENSA_TIMER_ID
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int "System timer CCOMPAREn register index"
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default 1
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depends on XTENSA_TIMER
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help
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Index of the CCOMPARE register (and associated interrupt)
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used for the system timer. Xtensa CPUs have hard-configured
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interrupt priorities associated with each timer, and some of
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them can be unmaskable (and thus not usable by OS code that
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need synchronization, like the timer subsystem!). Choose
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carefully. Generally you want the timer with the highest
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priority maskable interrupt.
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config SAM0_RTC_TIMER
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bool "Atmel SAM0 series RTC timer"
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depends on SOC_FAMILY_SAM0
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the Atmel SAM0
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series Real Time Counter and provides the standard "system clock
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driver" interfaces.
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config MCHP_XEC_RTOS_TIMER
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bool "Microchip XEC series RTOS timer"
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depends on SOC_FAMILY_MEC
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the Microchip
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XEC series RTOS timer and provides the standard "system clock
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driver" interfaces.
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config CC13X2_CC26X2_RTC_TIMER
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bool "TI SimpleLink CC13x2/CC26x2 RTC timer"
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depends on SOC_SERIES_CC13X2_CC26X2
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the TI SimpleLink
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CC13X2_CC26X2 series Real Time Counter and provides the standard
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"system clock driver" interfaces.
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config RCAR_CMT_TIMER
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bool "Renesas RCar cmt timer"
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default y
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depends on SOC_SERIES_RCAR_GEN3
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help
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This module implements a kernel device driver for the Renesas RCAR
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platform provides the standard "system clock driver" interfaces.
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If unchecked, no timer will be used.
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config XLNX_PSTTC_TIMER
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bool "Xilinx PS ttc timer support"
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default y
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depends on SOC_XILINX_ZYNQMP
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the Xilinx ZynqMP
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platform provides the standard "system clock driver" interfaces.
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If unchecked, no timer will be used.
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config XLNX_PSTTC_TIMER_INDEX
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int "Xilinx PS ttc timer index"
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range 0 3
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default 0
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depends on XLNX_PSTTC_TIMER
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help
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This is the index of TTC timer picked to provide system clock.
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config CAVS_TIMER
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bool "CAVS DSP Wall Clock Timer on Intel SoC"
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depends on CAVS_ICTL
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select TICKLESS_CAPABLE
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help
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The DSP wall clock timer is a timer driven directly by
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external oscillator and is external to the CPU core(s).
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It is not as fast as the internal core clock, but provides
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a common and synchronized counter for all CPU cores (which
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is useful for SMP).
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config LEON_GPTIMER
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bool "LEON timer"
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depends on SOC_SPARC_LEON
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select DYNAMIC_INTERRUPTS
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help
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This module implements a kernel device driver for the GRLIB
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GPTIMER which is common in LEON systems.
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config NPCX_ITIM_TIMER
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bool "Nuvoton NPCX series internal 64/32-bit timers"
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default y
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depends on SOC_FAMILY_NPCX
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the Nuvoton NPCX
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series internal 64/32-bit timers and provides the standard "system
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clock driver" interfaces.
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config SYSTEM_CLOCK_DISABLE
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bool "API to disable system clock"
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help
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This option enables the sys_clock_disable() API in the kernel. It is
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needed by some subsystems (which will automatically select it), but is
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rarely needed by applications.
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config TIMER_READS_ITS_FREQUENCY_AT_RUNTIME
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bool "Timer queries its hardware to find its frequency at runtime"
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help
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The drivers select this option automatically when needed. Do not modify
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this unless you have a very good reason for it.
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config SYSTEM_CLOCK_SLOPPY_IDLE
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bool "Timer allowed to skew uptime clock during idle"
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help
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When true, the timer driver is not required to maintain a
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correct system uptime count when the system enters idle.
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Some platforms may take advantage of this to reduce the
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overhead from regular interrupts required to handle counter
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wraparound conditions.
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config SYSTEM_CLOCK_INIT_PRIORITY
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int "System clock driver initialization priority"
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default 0
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help
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This options can be used to set a specific initialization priority
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value for the system clock driver. As driver initialization might need
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the clock to be running already, you should let the default value as it
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is (0).
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# Hidden option to be selected by individual SoC.
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config TICKLESS_CAPABLE
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bool
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help
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Timer drivers should select this flag if they are capable of
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supporting tickless operation. That is, a call to
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sys_clock_set_timeout() with a number of ticks greater than
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one should be expected not to produce a call to
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sys_clock_announce() (really, not to produce an interrupt at
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all) until the specified expiration.
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DT_COMPAT_NXP_OS_TIMER := nxp,os-timer
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config MCUX_OS_TIMER
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bool "MCUX OS Event timer"
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depends on HAS_MCUX_OS_TIMER
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default $(dt_compat_enabled,$(DT_COMPAT_NXP_OS_TIMER))
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the NXP OS
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event timer and provides the standard "system clock driver" interfaces.
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endmenu
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