The processor is made aware that the vector table built in the image is located at the start of SRAM in the case of a non-XIP image, rather than at 0 in as is the case in XIP images. Change-Id: I40b28ca32daf3e8930f103224766ed4e0ccc88e0 Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com> |
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