zephyr/arch/xtensa/include/xtensa_api.h
Patrik Flykt 4344e27c26 all: Update reserved function names
Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-11 13:48:42 -04:00

68 lines
1.4 KiB
C

/*
* Copyright (c) 2016 Cadence Design Systems, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_XTENSA_INCLUDE_XTENSA_API_H_
#define ZEPHYR_ARCH_XTENSA_INCLUDE_XTENSA_API_H_
#include <xtensa/hal.h>
#include "xtensa_rtos.h"
#include "xtensa_context.h"
/*
* Call this function to enable the specified interrupts.
*
* mask - Bit mask of interrupts to be enabled.
*/
#if CONFIG_XTENSA_ASM2
static inline void z_xt_ints_on(unsigned int mask)
{
int val;
__asm__ volatile("rsr.intenable %0" : "=r"(val));
val |= mask;
__asm__ volatile("wsr.intenable %0; rsync" : : "r"(val));
}
#else
extern void z_xt_ints_on(unsigned int mask);
#endif
/*
* Call this function to disable the specified interrupts.
*
* mask - Bit mask of interrupts to be disabled.
*/
#if CONFIG_XTENSA_ASM2
static inline void z_xt_ints_off(unsigned int mask)
{
int val;
__asm__ volatile("rsr.intenable %0" : "=r"(val));
val &= ~mask;
__asm__ volatile("wsr.intenable %0; rsync" : : "r"(val));
}
#else
extern void z_xt_ints_off(unsigned int mask);
#endif
/*
* Call this function to set the specified (s/w) interrupt.
*/
static inline void _xt_set_intset(unsigned int arg)
{
xthal_set_intset(arg);
}
/* Call this function to clear the specified (s/w or edge-triggered)
* interrupt.
*/
static inline void _xt_set_intclear(unsigned int arg)
{
xthal_set_intclear(arg);
}
#endif /* ZEPHYR_ARCH_XTENSA_INCLUDE_XTENSA_API_H_ */