zephyr/arch
Daniel Leung 388725870f arm: cortex_m: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Note that since Cortex-M does not have the thread ID or
process ID register needed to store TLS pointer at runtime
for toolchain to access thread data, a global variable is
used instead.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
..
arc arc: cpu_idle: remove sleep workround for nsim_hs_smp 2020-10-22 06:17:08 -04:00
arm arm: cortex_m: add support for thread local storage 2020-10-24 10:52:00 -07:00
common gen_isr_tables: Function ptr instead of (void *) 2020-10-02 18:48:46 +02:00
nios2 benchmarking: remove execution benchmarking code 2020-09-05 13:28:38 -05:00
posix arch: posix: add missing include for cpuhalt.c 2020-10-20 08:54:59 +02:00
riscv benchmarking: remove execution benchmarking code 2020-09-05 13:28:38 -05:00
x86 x86: add support for thread local storage 2020-10-24 10:52:00 -07:00
xtensa soc/xtensa: Misc. checkpatch fixups 2020-10-21 06:38:53 -04:00
CMakeLists.txt cmake: fix include directories to work with out-of-tree arch 2020-08-05 08:06:07 -04:00
Kconfig arm: cortex_m: add support for thread local storage 2020-10-24 10:52:00 -07:00