We need to use CPUAPP and CPUNET instead of CPU0 and CPU1 terminology, because those terms are the ones used throughout the DeviceTree definitions for nRF5340 SoC. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
26 lines
418 B
Text
26 lines
418 B
Text
/*
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* Copyright (c) 2019 - 2020 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <nordic/nrf5340_cpuapp.dtsi>
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&flash0 {
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reg = <0x00000000 DT_SIZE_K(1024)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(512)>;
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};
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&mpu {
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arm,num-mpu-regions = <16>;
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};
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/ {
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soc {
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compatible = "nordic,nRF5340-CPUAPP-QKAA", "nordic,nRF5340-CPUAPP", "nordic,nRF53", "simple-bus";
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};
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};
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