This commit clears current settings of the PWM perihperal that are stored inside device structure. This makes sure that PWM period and prescaler is configured as expected after driver was suspended. Signed-off-by: Radoslaw Koppel <radoslaw.koppel@nordicsemi.no>
440 lines
12 KiB
C
440 lines
12 KiB
C
/*
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* Copyright (c) 2018, Cue Health Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nrfx_pwm.h>
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#include <drivers/pwm.h>
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#include <hal/nrf_gpio.h>
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#include <stdbool.h>
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#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(pwm_nrfx);
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#define PWM_NRFX_CH_POLARITY_MASK BIT(15)
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#define PWM_NRFX_CH_PULSE_CYCLES_MASK BIT_MASK(15)
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#define PWM_NRFX_CH_VALUE_NORMAL PWM_NRFX_CH_POLARITY_MASK
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#define PWM_NRFX_CH_VALUE_INVERTED (0)
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#define PWM_NRFX_CH_PIN_MASK ~NRFX_PWM_PIN_INVERTED
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struct pwm_nrfx_config {
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nrfx_pwm_t pwm;
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nrfx_pwm_config_t initial_config;
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nrf_pwm_sequence_t seq;
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};
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struct pwm_nrfx_data {
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uint32_t period_cycles;
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uint16_t current[NRF_PWM_CHANNEL_COUNT];
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uint16_t countertop;
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uint8_t prescaler;
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};
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static int pwm_period_check_and_set(const struct pwm_nrfx_config *config,
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struct pwm_nrfx_data *data,
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uint32_t channel,
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uint32_t period_cycles)
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{
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uint8_t i;
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uint8_t prescaler;
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uint32_t countertop;
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/* If any other channel (other than the one being configured) is set up
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* with a non-zero pulse cycle, the period that is currently set cannot
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* be changed, as this would influence the output for this channel.
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*/
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for (i = 0; i < NRF_PWM_CHANNEL_COUNT; ++i) {
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if (i != channel) {
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uint16_t channel_pulse_cycle =
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data->current[i]
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& PWM_NRFX_CH_PULSE_CYCLES_MASK;
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if (channel_pulse_cycle > 0) {
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LOG_ERR("Incompatible period.");
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return -EINVAL;
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}
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}
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}
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/* Try to find a prescaler that will allow setting the requested period
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* after prescaling as the countertop value for the PWM peripheral.
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*/
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prescaler = 0;
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countertop = period_cycles;
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do {
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if (countertop <= PWM_COUNTERTOP_COUNTERTOP_Msk) {
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data->period_cycles = period_cycles;
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data->prescaler = prescaler;
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data->countertop = (uint16_t)countertop;
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nrf_pwm_configure(config->pwm.p_registers,
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data->prescaler,
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config->initial_config.count_mode,
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data->countertop);
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return 0;
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}
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countertop >>= 1;
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++prescaler;
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} while (prescaler <= PWM_PRESCALER_PRESCALER_Msk);
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LOG_ERR("Prescaler for period_cycles %u not found.", period_cycles);
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return -EINVAL;
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}
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static uint8_t pwm_channel_map(const uint8_t *output_pins, uint32_t pwm)
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{
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uint8_t i;
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/* Find pin, return channel number */
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for (i = 0U; i < NRF_PWM_CHANNEL_COUNT; i++) {
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if (output_pins[i] != NRFX_PWM_PIN_NOT_USED
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&& (pwm == (output_pins[i] & PWM_NRFX_CH_PIN_MASK))) {
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return i;
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}
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}
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/* Return NRF_PWM_CHANNEL_COUNT to show that PWM pin was not found. */
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return NRF_PWM_CHANNEL_COUNT;
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}
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static bool pwm_channel_is_active(uint8_t channel,
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const struct pwm_nrfx_data *data)
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{
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uint16_t pulse_cycle =
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data->current[channel] & PWM_NRFX_CH_PULSE_CYCLES_MASK;
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return (pulse_cycle > 0 && pulse_cycle < data->countertop);
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}
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static bool any_other_channel_is_active(uint8_t channel,
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const struct pwm_nrfx_data *data)
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{
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uint8_t i;
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for (i = 0; i < NRF_PWM_CHANNEL_COUNT; ++i) {
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if (i != channel && pwm_channel_is_active(i, data)) {
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return true;
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}
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}
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return false;
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}
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static int pwm_nrfx_pin_set(const struct device *dev, uint32_t pwm,
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uint32_t period_cycles, uint32_t pulse_cycles,
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pwm_flags_t flags)
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{
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/* We assume here that period_cycles will always be 16MHz
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* peripheral clock. Since pwm_nrfx_get_cycles_per_sec() function might
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* be removed, see ISSUE #6958.
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* TODO: Remove this comment when issue has been resolved.
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*/
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const struct pwm_nrfx_config *config = dev->config;
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struct pwm_nrfx_data *data = dev->data;
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uint8_t channel;
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bool was_stopped;
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if (flags) {
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/* PWM polarity not supported (yet?) */
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return -ENOTSUP;
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}
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/* Check if PWM pin is one of the predefiend DTS config pins.
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* Return its array index (channel number),
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* or NRF_PWM_CHANNEL_COUNT if not initialized through DTS.
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*/
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channel = pwm_channel_map(config->initial_config.output_pins, pwm);
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if (channel == NRF_PWM_CHANNEL_COUNT) {
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LOG_ERR("PWM pin %d not enabled through DTS configuration.",
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pwm);
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return -EINVAL;
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}
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/* Check if nrfx_pwm_stop function was called in previous
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* pwm_nrfx_pin_set call. Relying only on state returned by
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* nrfx_pwm_is_stopped may cause race condition if the pwm_nrfx_pin_set
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* is called multiple times in quick succession.
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*/
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was_stopped = !pwm_channel_is_active(channel, data) &&
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!any_other_channel_is_active(channel, data);
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/* If this PWM is in center-aligned mode, pulse and period lengths
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* are effectively doubled by the up-down count, so halve them here
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* to compensate.
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*/
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if (config->initial_config.count_mode == NRF_PWM_MODE_UP_AND_DOWN) {
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period_cycles /= 2;
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pulse_cycles /= 2;
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}
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/* Check if period_cycle is either matching currently used, or
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* possible to use with our prescaler options.
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*/
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if (period_cycles != data->period_cycles) {
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int ret = pwm_period_check_and_set(config, data, channel,
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period_cycles);
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if (ret) {
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return ret;
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}
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}
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/* Limit pulse cycles to period cycles (meaning 100% duty), bigger
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* values might not fit after prescaling into the 15-bit field that
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* is filled below.
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*/
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pulse_cycles = MIN(pulse_cycles, period_cycles);
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/* Store new pulse value bit[14:0], and polarity bit[15] for channel. */
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data->current[channel] = (
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(data->current[channel] & PWM_NRFX_CH_POLARITY_MASK)
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| (pulse_cycles >> data->prescaler));
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LOG_DBG("pin %u, pulse %u, period %u, prescaler: %u.",
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pwm, pulse_cycles, period_cycles, data->prescaler);
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/* If this channel turns out to not need to be driven by the PWM
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* peripheral (it is off or fully on - duty 0% or 100%), set properly
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* the GPIO configuration for its output pin. This will provide
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* the correct output state for this channel when the PWM peripheral
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* is disabled after all channels appear to be inactive.
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*/
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if (!pwm_channel_is_active(channel, data)) {
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/* If pulse 0% and pin not inverted, set LOW.
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* If pulse 100% and pin inverted, set LOW.
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* If pulse 0% and pin inverted, set HIGH.
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* If pulse 100% and pin not inverted, set HIGH.
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*/
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bool channel_inverted_state =
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config->initial_config.output_pins[channel]
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& NRFX_PWM_PIN_INVERTED;
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bool pulse_0_and_not_inverted =
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(pulse_cycles == 0U)
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&& !channel_inverted_state;
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bool pulse_100_and_inverted =
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(pulse_cycles == period_cycles)
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&& channel_inverted_state;
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if (pulse_0_and_not_inverted || pulse_100_and_inverted) {
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nrf_gpio_pin_clear(pwm);
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} else {
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nrf_gpio_pin_set(pwm);
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}
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if (!any_other_channel_is_active(channel, data)) {
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nrfx_pwm_stop(&config->pwm, false);
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}
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} else {
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/* Since we are playing the sequence in a loop, the
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* sequence only has to be started when its not already
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* playing. The new channel values will be used
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* immediately when they are written into the seq array.
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*/
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if (was_stopped) {
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/* Wait until PWM will be stopped and then start the
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* sequence.
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*/
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while (!nrfx_pwm_is_stopped(&config->pwm)) {
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}
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nrfx_pwm_simple_playback(&config->pwm,
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&config->seq,
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1,
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NRFX_PWM_FLAG_LOOP);
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}
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}
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return 0;
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}
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static int pwm_nrfx_get_cycles_per_sec(const struct device *dev, uint32_t pwm,
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uint64_t *cycles)
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{
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/* TODO: Since this function might be removed, we will always return
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* 16MHz from this function and handle the conversion with prescaler,
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* etc, in the pin set function. See issue #6958.
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*/
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*cycles = 16ul * 1000ul * 1000ul;
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return 0;
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}
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static const struct pwm_driver_api pwm_nrfx_drv_api_funcs = {
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.pin_set = pwm_nrfx_pin_set,
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.get_cycles_per_sec = pwm_nrfx_get_cycles_per_sec,
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};
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static int pwm_nrfx_init(const struct device *dev)
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{
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const struct pwm_nrfx_config *config = dev->config;
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nrfx_err_t result = nrfx_pwm_init(&config->pwm,
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&config->initial_config,
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NULL,
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NULL);
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if (result != NRFX_SUCCESS) {
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LOG_ERR("Failed to initialize device: %s", dev->name);
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return -EBUSY;
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}
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return 0;
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}
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#ifdef CONFIG_PM_DEVICE
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static void pwm_nrfx_uninit(const struct device *dev)
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{
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const struct pwm_nrfx_config *config = dev->config;
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nrfx_pwm_uninit(&config->pwm);
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memset(dev->data, 0, sizeof(struct pwm_nrfx_data));
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}
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static int pwm_nrfx_set_power_state(uint32_t new_state,
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uint32_t current_state,
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const struct device *dev)
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{
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int err = 0;
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switch (new_state) {
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case PM_DEVICE_STATE_ACTIVE:
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err = pwm_nrfx_init(dev);
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break;
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case PM_DEVICE_STATE_LOW_POWER:
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case PM_DEVICE_STATE_SUSPEND:
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case PM_DEVICE_STATE_FORCE_SUSPEND:
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case PM_DEVICE_STATE_OFF:
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if (current_state == PM_DEVICE_STATE_ACTIVE) {
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pwm_nrfx_uninit(dev);
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}
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break;
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default:
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__ASSERT_NO_MSG(false);
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break;
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}
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return err;
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}
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static int pwm_nrfx_pm_control(const struct device *dev,
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uint32_t ctrl_command,
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uint32_t *state,
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uint32_t *current_state)
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{
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int err = 0;
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if (ctrl_command == PM_DEVICE_STATE_SET) {
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uint32_t new_state = *((const uint32_t *)state);
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if (new_state != (*current_state)) {
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err = pwm_nrfx_set_power_state(new_state,
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*current_state,
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dev);
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if (!err) {
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*current_state = new_state;
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}
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}
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} else {
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__ASSERT_NO_MSG(ctrl_command == PM_DEVICE_STATE_GET);
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*state = *current_state;
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}
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return err;
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}
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#define PWM_NRFX_PM_CONTROL(idx) \
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static int pwm_##idx##_nrfx_pm_control(const struct device *dev, \
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uint32_t ctrl_command, \
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uint32_t *state, \
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pm_device_cb cb, \
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void *arg) \
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{ \
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static uint32_t current_state = PM_DEVICE_STATE_ACTIVE; \
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int ret = 0; \
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ret = pwm_nrfx_pm_control(dev, ctrl_command, state, \
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¤t_state); \
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if (cb) { \
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cb(dev, ret, state, arg); \
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} \
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return ret; \
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}
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#else
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#define PWM_NRFX_PM_CONTROL(idx)
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#endif /* CONFIG_PM_DEVICE */
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#define PWM(dev_idx) DT_NODELABEL(pwm##dev_idx)
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#define PWM_PROP(dev_idx, prop) DT_PROP(PWM(dev_idx), prop)
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#define PWM_NRFX_IS_INVERTED(dev_idx, ch_idx) \
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PWM_PROP(dev_idx, ch##ch_idx##_inverted)
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#define PWM_NRFX_CH_PIN(dev_idx, ch_idx) \
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COND_CODE_1(DT_NODE_HAS_PROP(PWM(dev_idx), ch##ch_idx##_pin), \
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(PWM_PROP(dev_idx, ch##ch_idx##_pin)), \
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(NRFX_PWM_PIN_NOT_USED))
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#define PWM_NRFX_OUTPUT_PIN(dev_idx, ch_idx) \
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(PWM_NRFX_CH_PIN(dev_idx, ch_idx) | \
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(PWM_NRFX_IS_INVERTED(dev_idx, ch_idx) ? NRFX_PWM_PIN_INVERTED : 0))
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#define PWM_NRFX_DEFAULT_VALUE(dev_idx, ch_idx) \
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(PWM_NRFX_IS_INVERTED(dev_idx, ch_idx) ? \
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PWM_NRFX_CH_VALUE_INVERTED : PWM_NRFX_CH_VALUE_NORMAL)
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#define PWM_NRFX_COUNT_MODE(dev_idx) \
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(PWM_PROP(dev_idx, center_aligned) ? \
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NRF_PWM_MODE_UP_AND_DOWN : NRF_PWM_MODE_UP)
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#define PWM_NRFX_DEVICE(idx) \
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static struct pwm_nrfx_data pwm_nrfx_##idx##_data = { \
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.current = { \
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PWM_NRFX_DEFAULT_VALUE(idx, 0), \
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PWM_NRFX_DEFAULT_VALUE(idx, 1), \
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PWM_NRFX_DEFAULT_VALUE(idx, 2), \
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PWM_NRFX_DEFAULT_VALUE(idx, 3), \
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} \
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}; \
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static const struct pwm_nrfx_config pwm_nrfx_##idx##config = { \
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.pwm = NRFX_PWM_INSTANCE(idx), \
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.initial_config = { \
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.output_pins = { \
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PWM_NRFX_OUTPUT_PIN(idx, 0), \
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PWM_NRFX_OUTPUT_PIN(idx, 1), \
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PWM_NRFX_OUTPUT_PIN(idx, 2), \
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PWM_NRFX_OUTPUT_PIN(idx, 3), \
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}, \
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.base_clock = NRF_PWM_CLK_1MHz, \
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.count_mode = PWM_NRFX_COUNT_MODE(idx), \
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.top_value = 1000, \
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.load_mode = NRF_PWM_LOAD_INDIVIDUAL, \
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.step_mode = NRF_PWM_STEP_TRIGGERED, \
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}, \
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.seq.values.p_raw = pwm_nrfx_##idx##_data.current, \
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.seq.length = NRF_PWM_CHANNEL_COUNT \
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}; \
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PWM_NRFX_PM_CONTROL(idx) \
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DEVICE_DT_DEFINE(PWM(idx), \
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pwm_nrfx_init, pwm_##idx##_nrfx_pm_control, \
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&pwm_nrfx_##idx##_data, \
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&pwm_nrfx_##idx##config, \
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&pwm_nrfx_drv_api_funcs)
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(pwm0), okay)
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PWM_NRFX_DEVICE(0);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(pwm1), okay)
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PWM_NRFX_DEVICE(1);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(pwm2), okay)
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PWM_NRFX_DEVICE(2);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(pwm3), okay)
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PWM_NRFX_DEVICE(3);
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#endif
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