zephyr/soc/nxp
Robin Kastberg 2ce0fd6172 soc: nxp: imxrt: MIMXRT1062 IVT needs to be FIRST
IMXRT1062 bootrom reads boothdr initial vector table
from 0x60001000. In the CMAKE scatter linker scripts we put multiple
sections at offset 0x1000 in the rom. In linkers other than LD, we are
not guaranteed a particular order when placing these.
If we specify FIRST we can count on the .ivt coming first. The other
positions aren't as crucial.

From IMXRT1060RM.pdf 9.7.1

> The location of the IVT is the only fixed requirement by the ROM.
> The remainder or the image memory map is flexible and
> is determined by the contents of the IVT.

Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
2024-10-21 12:36:02 +02:00
..
common soc: imxrt: Fix flexspi xip configuration issue 2024-09-10 14:42:15 +01:00
imx dts: arm: nxp: nxp_imx8m_m4: Add ECSPI devices 2024-10-07 18:43:35 +02:00
imxrt soc: nxp: imxrt: MIMXRT1062 IVT needs to be FIRST 2024-10-21 12:36:02 +02:00
kinetis soc: nxp: k6x: disable on reset NMI and EzPort 2024-10-17 10:49:26 -04:00
layerscape
lpc soc: nxp: lpc55xxx: fix dependencies for SOC_FLASH_MCUX 2024-10-15 04:08:15 -04:00
mcx soc: MCXW71: Add BLE support 2024-10-17 09:45:42 +02:00
rw soc: nxp: rw: Introduce HAS_NXP_MONOLITHIC_BT config 2024-10-18 17:45:07 +01:00
s32 soc: nxp: s32ze: add support eDMA3 for S32Z270 2024-10-18 14:16:05 +02:00