Scott Worley 4d1139de91 soc: microchip: mec: Unify kernel timer tick rate configuration ... Microchip MEC was configuring the kernel timer tick rate at the board level instead of the SoC level. We unify all this by moving the Kconfig logic out of the board level into each mec chip. We also derive SYS_CLOCK_HW_TICKS_PER_SEC from the device tree node enabled for the kernel timer: Microchip's 32 KHz RTOT timer or Cortex-M4 SYSTICK. The soc kconfig rules are loading all mec subdirectories for every build causing warnings when building new socs with this change. We made the changes for all the mec chips. Signed-off-by: Scott Worley <scott.worley@microchip.com>		2025-04-11 17:31:37 +02:00
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mec	soc: microchip: mec: Unify kernel timer tick rate configuration	2025-04-11 17:31:37 +02:00
miv	soc: miv: polarfire: Increase NUM_IRQS to cover 1st and 2nd level irqs	2025-03-19 09:02:06 -04:00