Sylvio Alves 27907d0625 soc: esp32: soc does not support 2 cores ... Current ESP32 implementation does not support 2 CPUS. Explicit set this to single core. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>		2021-10-23 20:44:26 -04:00
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esp32	soc: esp32: soc does not support 2 cores	2021-10-23 20:44:26 -04:00
esp32s2	soc: esp32s2: Fix RAM offset calculation	2021-10-13 10:13:58 -04:00
intel_adsp	Xtensa: ADSP: bootloader: use proper struct field access	2021-10-21 07:34:03 -04:00
intel_s1000	Revert "linker: xtensa: move IDT_LIST region"	2021-09-08 20:29:53 -05:00
nxp_adsp	soc: xtensa: adsp: add support for NXP ADSP for i.MX8MP	2021-10-20 19:08:50 -04:00
sample_controller	linker: align _image_text_start/end/size linker symbols name	2021-08-28 08:48:03 -04:00
CMakeLists.txt	soc/xtensa/intel_adsp: Upstream updates	2020-10-21 06:38:53 -04:00