zephyr/dts/riscv/wch/ch32v203/ch32v203f8u.dtsi
Camille BAUD 2013d6e129 dts: wch: Introduce CH32V203
Introduce CH32V203 SoC

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-05-14 11:02:52 +01:00

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Text

/*
* Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <wch/ch32v203/ch32v203.dtsi>
&gpioa {
gpio-reserved-ranges = <11 13>, <15 16>;
};
&gpiob {
gpio-reserved-ranges = <2 10>, <12 14>;
};
&gpioc {
gpio-reserved-ranges = <0 16>;
};
&gpiod {
gpio-reserved-ranges = <0 16>;
};
&sram0 {
reg = <0x20000000 DT_SIZE_K(20)>;
};