1be0c05311
Introduce the basic ARM64 architecture support. A new CONFIG_ARM64 symbol is introduced for the new architecture and new cmake / Kconfig files are added to switch between ARM and ARM64. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
65 lines
1.2 KiB
C
65 lines
1.2 KiB
C
/*
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* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Either public functions or macros or invoked by public functions */
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#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_ASM_INLINE_GCC_H_
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#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_ASM_INLINE_GCC_H_
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/*
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* The file must not be included directly
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* Include arch/cpu.h instead
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*/
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#ifndef _ASMLANGUAGE
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#include <arch/arm/aarch64/cpu.h>
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#include <zephyr/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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static ALWAYS_INLINE unsigned int arch_irq_lock(void)
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{
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unsigned int key;
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/*
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* Return the whole DAIF register as key but use DAIFSET to disable
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* IRQs.
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*/
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__asm__ volatile("mrs %0, daif;"
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"msr daifset, %1;"
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"isb"
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: "=r" (key)
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: "i" (DAIFSET_IRQ)
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: "memory", "cc");
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return key;
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}
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static ALWAYS_INLINE void arch_irq_unlock(unsigned int key)
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{
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__asm__ volatile("msr daif, %0;"
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"isb"
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:
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: "r" (key)
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: "memory", "cc");
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}
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static ALWAYS_INLINE bool arch_irq_unlocked(unsigned int key)
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{
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/* We only check the (I)RQ bit on the DAIF register */
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return (key & DAIF_IRQ) == 0;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_ASM_INLINE_GCC_H_ */
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