zephyr/boards/arm/rddrone_fmuk66/rddrone_fmuk66.dts
Daniel DeGrasse 17d9bea474 drivers: edma: allow transfer descriptors to be placed in SRAM
SOCs using the EDMA IP that supported caching must locate EDMA transfer
control descriptors (TCDs) in non cacheable memory. For M7 cores, this
can simply use the "nocache" section. For M4 cores, where the nocache
section does not exist, the chosen SRAM section must be a tightly
coupled memory block which cannot be cached. Add a note to all boards
with M4 SOCs that support caching explaining this issue, and enable EDMA
driver to locate TCDs in SRAM.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-22 09:44:19 +02:00

298 lines
5.2 KiB
Text

/*
* Copyright (c) 2021, Electromaticus LLC, 2022 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nxp/nxp_k66.dtsi>
#include <dt-bindings/pwm/pwm.h>
#include "rddrone_fmuk66-pinctrl.dtsi"
/ {
model = "NXP RDDRONE FMUK66 board";
compatible = "nxp,mk66f18", "nxp,k66f", "nxp,k6x";
aliases {
led0 = &amber_led;
led1 = &green_led;
pwm-led0 = &red_pwm_led;
pwm-led1 = &green_pwm_led;
pwm-led2 = &blue_pwm_led;
};
chosen {
/*
* Note: when using DMA, the SRAM region must be set to
* a memory region that is not cached by the chip. If the chosen
* sram region is changed and DMA is in use, you will
* encounter issues!
*/
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,console = &lpuart0;
zephyr,shell-uart = &lpuart0;
zephyr,uart-pipe = &lpuart0;
zephyr,canbus = &flexcan0;
};
leds {
compatible = "gpio-leds";
amber_led: led_0 {
gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
label = "LED_AMB";
};
green_led: led_1 {
gpios = <&gpiod 14 GPIO_ACTIVE_LOW>;
label = "LED_GRN";
};
};
pwmleds {
compatible = "pwm-leds";
red_pwm_led: red_pwm_led {
pwms = <&ftm3 1 15625000 PWM_POLARITY_INVERTED>;
};
blue_pwm_led: blue_pwm_led {
pwms = <&ftm3 4 15625000 PWM_POLARITY_INVERTED>;
};
green_pwm_led: green_pwm_led {
pwms = <&ftm3 5 15625000 PWM_POLARITY_INVERTED>;
};
};
transceiver0: can-phy0 {
compatible = "nxp,tja1042", "can-transceiver-gpio";
max-bitrate = <5000000>;
standby-gpios = <&gpioc 19 GPIO_ACTIVE_HIGH>;
#phy-cells = <0>;
};
transceiver1: can-phy1 {
compatible = "nxp,tja1042", "can-transceiver-gpio";
max-bitrate = <5000000>;
standby-gpios = <&gpioc 18 GPIO_ACTIVE_HIGH>;
#phy-cells = <0>;
};
};
&sim {
pllfll-select = <KINETIS_SIM_PLLFLLSEL_MCGPLLCLK>;
er32k-select = <KINETIS_SIM_ER32KSEL_RTC>;
};
&cpu0 {
clock-frequency = <160000000>;
};
&adc0 {
status = "okay";
};
&adc1 {
status = "okay";
};
&temp1 {
status = "okay";
};
&dac0 {
status = "okay";
voltage-reference = <2>;
};
/* PWM header is powered by FlexTimer 0 for channels 1 to 4 */
&ftm0 {
status = "okay";
compatible = "nxp,kinetis-ftm-pwm";
#pwm-cells = <3>;
pinctrl-0 = <&ftm0_default>;
pinctrl-names = "default";
};
/* RGB LED powered by FlexTimer 3, and PWM headers for channel 5 and 6 */
&ftm3 {
status = "okay";
compatible = "nxp,kinetis-ftm-pwm";
#pwm-cells = <3>;
pinctrl-0 = <&ftm3_default>;
pinctrl-names = "default";
};
/* LPUART connected to debug header */
&lpuart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&lpuart0_default>;
pinctrl-names = "default";
};
zephyr_udc0: &usbotg {
compatible = "nxp,kinetis-usbd";
status = "okay";
num-bidir-endpoints = <8>;
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&uart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_default>;
pinctrl-names = "default";
};
&uart2 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart2_default>;
pinctrl-names = "default";
};
&uart4 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart4_default>;
pinctrl-names = "default";
};
&usbotg {
compatible = "nxp,kinetis-usbd";
status = "okay";
num-bidir-endpoints = <8>;
};
&gpioa {
status = "okay";
};
&gpiob {
status = "okay";
};
&gpioc {
status = "okay";
};
&gpiod {
status = "okay";
};
&gpioe {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x00010000>;
read-only;
};
/*
* The flash starting at 0x00010000 and ending at
* 0x0001ffff (sectors 16-31) is reserved for use
* by the application.
*/
storage_partition: partition@1e000 {
label = "storage";
reg = <0x0001e000 0x00002000>;
};
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 0x00060000>;
};
slot1_partition: partition@80000 {
label = "image-1";
reg = <0x00080000 0x00060000>;
};
scratch_partition: partition@e0000 {
label = "image-scratch";
reg = <0x000e0000 0x00020000>;
};
};
};
&enet {
status = "okay";
pinctrl-0 = <&enet_default>;
pinctrl-names = "default";
};
&flexcan0 {
status = "okay";
pinctrl-0 = <&flexcan0_default>;
pinctrl-names = "default";
bus-speed = <125000>;
phys = <&transceiver0>;
};
&flexcan1 {
status = "okay";
pinctrl-0 = <&flexcan1_default>;
pinctrl-names = "default";
bus-speed = <125000>;
phys = <&transceiver1>;
};
/* external i2c port */
&i2c0 {
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
/* magnetometer (bmm150), barometer (bmp280), pressure (mpl3115),
* secure element (a7102ch) i2c bus
*/
&i2c1 {
status = "okay";
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
};
/* f-ram spi port */
&spi0 {
status = "okay";
pinctrl-0 = <&spi0_default>;
pinctrl-names = "default";
};
/* flash (w25x40), accel, magneto (fxos8700), gyro (fxas2100) */
&spi1 {
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-names = "default";
};
/* external spi */
&spi2 {
status = "okay";
pinctrl-0 = <&spi2_default>;
pinctrl-names = "default";
};
&edma0 {
status = "okay";
};
&pit0 {
status = "okay";
};