zephyr/arch/riscv/core
Huang Qi 2c277077fe arch: riscv: Use infinite loop instead of simple wfi to halt slave core
If it's a multicore system, infinite loop wfi to halt slave core

Signed-off-by: Huang Qi <757509347@qq.com>
2019-09-20 10:42:28 -04:00
..
offsets riscv32: rename to riscv 2019-08-02 13:54:48 -07:00
CMakeLists.txt riscv32: rename to riscv 2019-08-02 13:54:48 -07:00
cpu_idle.c riscv32: rename to riscv 2019-08-02 13:54:48 -07:00
fatal.c kernel: remove z_fatal_print() 2019-09-12 05:17:39 -04:00
irq_manage.c kernel: remove z_fatal_print() 2019-09-12 05:17:39 -04:00
irq_offload.c riscv32: rename to riscv 2019-08-02 13:54:48 -07:00
isr.S include: arch: riscv: rename global macro 2019-08-17 11:48:02 +02:00
prep_c.c riscv32: rename to riscv 2019-08-02 13:54:48 -07:00
reset.S arch: riscv: Use infinite loop instead of simple wfi to halt slave core 2019-09-20 10:42:28 -04:00
swap.S include: arch: riscv: rename global macro 2019-08-17 11:48:02 +02:00
thread.c riscv: make core code 64-bit compatible 2019-08-02 13:54:48 -07:00