zephyr/soc/xtensa/intel_adsp/common
Andy Ross 12df8fca4e soc: intel_asdp: Clean up soc_init() code
Reorganize the initialization code to cleanly separate the platforms
and clarify which code is common.  The #if'ery was sort of a mess.
This is in preparation for an incoming patch that unifies the shim
register definitions across platform variants.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-11-23 13:23:54 -05:00
..
bootloader soc/intel_adsp: Fix _ASMLANGUAGE declaration for boot_entry.S 2021-11-23 13:23:54 -05:00
include soc: intel_adsp: Add INTCTRL register interface 2021-09-03 07:19:34 -04:00
adsp.c soc/intel_adsp: Increase init priority of trace windows 2021-09-03 07:19:34 -04:00
bootloader.cmake soc: xtensa/intel_adsp: fix bootloader building under XCC 2021-07-22 15:41:11 +03:00
CMakeLists.txt sof: remove superfluous and duplicate code 2021-01-11 16:10:23 -05:00
fix_elf_addrs.py soc/intel_adsp: Suppress benign linker warnings out of objcopy 2020-12-10 06:49:27 -06:00
main_entry.S xtensa: don't build and run the reset handler twice 2021-01-13 18:17:40 -05:00
soc.c soc: intel_asdp: Clean up soc_init() code 2021-11-23 13:23:54 -05:00
soc_mp.c soc: intel_adsp: General soc_mp.c cleanup 2021-11-23 13:23:54 -05:00
trace_out.c boards: intel_adsp: add comments explaining log IDs start from 1 2021-11-07 05:34:06 -05:00