081c9c3bec
Indexed defines were systematically generated even when there was only one element to generate. So we ended up generated a lot of _0 defines. Then we needed to generate aliases to these _0 indexed defines, in order to get useful defines. For instance: #define GPIO_LEDS_0_GPIO_FLAGS_0 4 #define GPIO_LEDS_0_GPIO_PIN_0 5 #define GPIO_LEDS_0_GPIO_FLAGS GPIO_LEDS_0_GPIO_FLAGS_0 #define GPIO_LEDS_0_GPIO_PIN GPIO_LEDS_0_GPIO_PIN_0 This commit allows to generate _0 indexed define only if a property has more than one elements to define. Aliases generation to _0 indexed defines are also removed. Note: IRQ are left untouched since this is frequent to handle multiple IRQs in a driver Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
50 lines
2.8 KiB
Text
50 lines
2.8 KiB
Text
/* SoC level DTS fixup file */
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
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#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED
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#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_PORT_1_NAME ST_STM32_USART_40013800_LABEL
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#define PORT_1_IRQ ST_STM32_USART_40013800_IRQ_0
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#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
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#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED
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#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_PORT_2_NAME ST_STM32_USART_40004400_LABEL
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#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0
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#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS
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#define CONFIG_I2C_1_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
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#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
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#define CONFIG_I2C_1_COMBINED_IRQ ST_STM32_I2C_V2_40005400_IRQ_COMBINED
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#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
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#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
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#define CONFIG_I2C_2_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
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#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
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#define CONFIG_I2C_2_COMBINED_IRQ ST_STM32_I2C_V2_40005800_IRQ_COMBINED
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#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
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#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
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#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
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#define CONFIG_SPI_1_NAME ST_STM32_SPI_FIFO_40013000_LABEL
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#define CONFIG_SPI_1_IRQ ST_STM32_SPI_FIFO_40013000_IRQ_0
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#define CONFIG_SPI_2_BASE_ADDRESS ST_STM32_SPI_FIFO_40003800_BASE_ADDRESS
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#define CONFIG_SPI_2_IRQ_PRI ST_STM32_SPI_FIFO_40003800_IRQ_0_PRIORITY
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#define CONFIG_SPI_2_NAME ST_STM32_SPI_FIFO_40003800_LABEL
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#define CONFIG_SPI_2_IRQ ST_STM32_SPI_FIFO_40003800_IRQ_0
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#define FLASH_DEV_BASE_ADDRESS ST_STM32F0_FLASH_CONTROLLER_40022000_BASE_ADDRESS
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#define FLASH_DEV_NAME ST_STM32F0_FLASH_CONTROLLER_40022000_LABEL
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#define CONFIG_USB_BASE_ADDRESS ST_STM32_USB_40005C00_BASE_ADDRESS
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#define CONFIG_USB_IRQ ST_STM32_USB_40005C00_IRQ_USB
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#define CONFIG_USB_IRQ_PRI ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
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#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
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#define CONFIG_USB_NUM_IN_ENDPOINTS ST_STM32_USB_40005C00_NUM_IN_ENDPOINTS
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#define CONFIG_USB_NUM_OUT_ENDPOINTS ST_STM32_USB_40005C00_NUM_OUT_ENDPOINTS
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#define CONFIG_USB_RAM_SIZE ST_STM32_USB_40005C00_RAM_SIZE
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/* End of SoC Level DTS fixup file */
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