081c9c3bec
Indexed defines were systematically generated even when there was only one element to generate. So we ended up generated a lot of _0 defines. Then we needed to generate aliases to these _0 indexed defines, in order to get useful defines. For instance: #define GPIO_LEDS_0_GPIO_FLAGS_0 4 #define GPIO_LEDS_0_GPIO_PIN_0 5 #define GPIO_LEDS_0_GPIO_FLAGS GPIO_LEDS_0_GPIO_FLAGS_0 #define GPIO_LEDS_0_GPIO_PIN GPIO_LEDS_0_GPIO_PIN_0 This commit allows to generate _0 indexed define only if a property has more than one elements to define. Aliases generation to _0 indexed defines are also removed. Note: IRQ are left untouched since this is frequent to handle multiple IRQs in a driver Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
104 lines
6.5 KiB
Text
104 lines
6.5 KiB
Text
/* This file is a temporary workaround for mapping of the generated information
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* to the current driver definitions. This will be removed when the drivers
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* are modified to handle the generated information, or the mapping of
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* generated data matches the driver definitions.
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*/
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/* SoC level DTS fixup file */
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_GPIO_SAM_PORTA_LABEL ATMEL_SAM_GPIO_400E0E00_LABEL
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#define CONFIG_GPIO_SAM_PORTA_BASE_ADDRESS ATMEL_SAM_GPIO_400E0E00_BASE_ADDRESS
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#define CONFIG_GPIO_SAM_PORTA_IRQ ATMEL_SAM_GPIO_400E0E00_IRQ_0
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#define CONFIG_GPIO_SAM_PORTA_IRQ_PRIO ATMEL_SAM_GPIO_400E0E00_IRQ_0_PRIORITY
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#define CONFIG_GPIO_SAM_PORTA_PERIPHERAL_ID ATMEL_SAM_GPIO_400E0E00_PERIPHERAL_ID
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#define CONFIG_GPIO_SAM_PORTB_LABEL ATMEL_SAM_GPIO_400E1000_LABEL
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#define CONFIG_GPIO_SAM_PORTB_BASE_ADDRESS ATMEL_SAM_GPIO_400E1000_BASE_ADDRESS
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#define CONFIG_GPIO_SAM_PORTB_IRQ ATMEL_SAM_GPIO_400E1000_IRQ_0
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#define CONFIG_GPIO_SAM_PORTB_IRQ_PRIO ATMEL_SAM_GPIO_400E1000_IRQ_0_PRIORITY
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#define CONFIG_GPIO_SAM_PORTB_PERIPHERAL_ID ATMEL_SAM_GPIO_400E1000_PERIPHERAL_ID
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#define CONFIG_GPIO_SAM_PORTC_LABEL ATMEL_SAM_GPIO_400E1200_LABEL
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#define CONFIG_GPIO_SAM_PORTC_BASE_ADDRESS ATMEL_SAM_GPIO_400E1200_BASE_ADDRESS
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#define CONFIG_GPIO_SAM_PORTC_IRQ ATMEL_SAM_GPIO_400E1200_IRQ_0
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#define CONFIG_GPIO_SAM_PORTC_IRQ_PRIO ATMEL_SAM_GPIO_400E1200_IRQ_0_PRIORITY
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#define CONFIG_GPIO_SAM_PORTC_PERIPHERAL_ID ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID
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#define CONFIG_GPIO_SAM_PORTD_LABEL ATMEL_SAM_GPIO_400E1400_LABEL
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#define CONFIG_GPIO_SAM_PORTD_BASE_ADDRESS ATMEL_SAM_GPIO_400E1400_BASE_ADDRESS
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#define CONFIG_GPIO_SAM_PORTD_IRQ ATMEL_SAM_GPIO_400E1400_IRQ_0
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#define CONFIG_GPIO_SAM_PORTD_IRQ_PRIO ATMEL_SAM_GPIO_400E1400_IRQ_0_PRIORITY
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#define CONFIG_GPIO_SAM_PORTD_PERIPHERAL_ID ATMEL_SAM_GPIO_400E1400_PERIPHERAL_ID
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#define CONFIG_GPIO_SAM_PORTE_LABEL ATMEL_SAM_GPIO_400E1600_LABEL
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#define CONFIG_GPIO_SAM_PORTE_BASE_ADDRESS ATMEL_SAM_GPIO_400E1600_BASE_ADDRESS
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#define CONFIG_GPIO_SAM_PORTE_IRQ ATMEL_SAM_GPIO_400E1600_IRQ_0
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#define CONFIG_GPIO_SAM_PORTE_IRQ_PRIO ATMEL_SAM_GPIO_400E1600_IRQ_0_PRIORITY
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#define CONFIG_GPIO_SAM_PORTE_PERIPHERAL_ID ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID
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#define CONFIG_I2C_0_BASE_ADDRESS ATMEL_SAM_I2C_TWIHS_40018000_BASE_ADDRESS
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#define CONFIG_I2C_0_NAME ATMEL_SAM_I2C_TWIHS_40018000_LABEL
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#define CONFIG_I2C_0_BITRATE ATMEL_SAM_I2C_TWIHS_40018000_CLOCK_FREQUENCY
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#define CONFIG_I2C_0_IRQ ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0
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#define CONFIG_I2C_0_IRQ_PRI ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0_PRIORITY
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#define CONFIG_I2C_0_PERIPHERAL_ID ATMEL_SAM_I2C_TWIHS_40018000_PERIPHERAL_ID
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#define CONFIG_I2C_1_BASE_ADDRESS ATMEL_SAM_I2C_TWIHS_4001C000_BASE_ADDRESS
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#define CONFIG_I2C_1_NAME ATMEL_SAM_I2C_TWIHS_4001C000_LABEL
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#define CONFIG_I2C_1_BITRATE ATMEL_SAM_I2C_TWIHS_4001C000_CLOCK_FREQUENCY
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#define CONFIG_I2C_1_IRQ ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0
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#define CONFIG_I2C_1_IRQ_PRI ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0_PRIORITY
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#define CONFIG_I2C_1_PERIPHERAL_ID ATMEL_SAM_I2C_TWIHS_4001C000_PERIPHERAL_ID
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#define CONFIG_I2C_2_BASE_ADDRESS ATMEL_SAM_I2C_TWIHS_40060000_BASE_ADDRESS
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#define CONFIG_I2C_2_NAME ATMEL_SAM_I2C_TWIHS_40060000_LABEL
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#define CONFIG_I2C_2_BITRATE ATMEL_SAM_I2C_TWIHS_40060000_CLOCK_FREQUENCY
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#define CONFIG_I2C_2_IRQ ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0
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#define CONFIG_I2C_2_IRQ_PRI ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0_PRIORITY
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#define CONFIG_I2C_2_PERIPHERAL_ID ATMEL_SAM_I2C_TWIHS_40060000_PERIPHERAL_ID
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#define CONFIG_UART_SAM_PORT_0_NAME ATMEL_SAM_UART_400E0800_LABEL
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#define CONFIG_UART_SAM_PORT_0_BAUD_RATE ATMEL_SAM_UART_400E0800_CURRENT_SPEED
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#define CONFIG_UART_SAM_PORT_0_IRQ ATMEL_SAM_UART_400E0800_IRQ_0
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#define CONFIG_UART_SAM_PORT_0_IRQ_PRIO ATMEL_SAM_UART_400E0800_IRQ_0_PRIORITY
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#define CONFIG_UART_SAM_PORT_1_NAME ATMEL_SAM_UART_400E0A00_LABEL
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#define CONFIG_UART_SAM_PORT_1_BAUD_RATE ATMEL_SAM_UART_400E0A00_CURRENT_SPEED
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#define CONFIG_UART_SAM_PORT_1_IRQ ATMEL_SAM_UART_400E0A00_IRQ_0
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#define CONFIG_UART_SAM_PORT_1_IRQ_PRIO ATMEL_SAM_UART_400E0A00_IRQ_0_PRIORITY
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#define CONFIG_UART_SAM_PORT_2_NAME ATMEL_SAM_UART_400E1A00 _LABEL
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#define CONFIG_UART_SAM_PORT_2_BAUD_RATE ATMEL_SAM_UART_400E1A00_CURRENT_SPEED
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#define CONFIG_UART_SAM_PORT_2_IRQ ATMEL_SAM_UART_400E1A00_IRQ_0
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#define CONFIG_UART_SAM_PORT_2_IRQ_PRIO ATMEL_SAM_UART_400E1A00_IRQ_0_PRIORITY
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#define CONFIG_UART_SAM_PORT_3_NAME ATMEL_SAM_UART_400E1C00_LABEL
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#define CONFIG_UART_SAM_PORT_3_BAUD_RATE ATMEL_SAM_UART_400E1C00_CURRENT_SPEED
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#define CONFIG_UART_SAM_PORT_3_IRQ ATMEL_SAM_UART_400E1C00_IRQ_0
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#define CONFIG_UART_SAM_PORT_3_IRQ_PRIO ATMEL_SAM_UART_400E1C00_IRQ_0_PRIORITY
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#define CONFIG_UART_SAM_PORT_4_NAME ATMEL_SAM_UART_400E1E00_LABEL
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#define CONFIG_UART_SAM_PORT_4_BAUD_RATE ATMEL_SAM_UART_400E1E00_CURRENT_SPEED
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#define CONFIG_UART_SAM_PORT_4_IRQ ATMEL_SAM_UART_400E1E00_IRQ_0
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#define CONFIG_UART_SAM_PORT_4_IRQ_PRIO ATMEL_SAM_UART_400E1E00_IRQ_0_PRIORITY
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#define CONFIG_USART_SAM_PORT_0_NAME ATMEL_SAM_USART_40024000_LABEL
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#define CONFIG_USART_SAM_PORT_0_BAUD_RATE ATMEL_SAM_USART_40024000_CURRENT_SPEED
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#define CONFIG_USART_SAM_PORT_0_IRQ ATMEL_SAM_USART_40024000_IRQ_0
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#define CONFIG_USART_SAM_PORT_0_IRQ_PRIO ATMEL_SAM_USART_40024000_IRQ_0_PRIORITY
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#define CONFIG_USART_SAM_PORT_0_PERIPHERAL_ID ATMEL_SAM_USART_40024000_PERIPHERAL_ID
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#define CONFIG_USART_SAM_PORT_1_NAME ATMEL_SAM_USART_40028000_LABEL
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#define CONFIG_USART_SAM_PORT_1_BAUD_RATE ATMEL_SAM_USART_40028000_CURRENT_SPEED
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#define CONFIG_USART_SAM_PORT_1_IRQ ATMEL_SAM_USART_40028000_IRQ_0
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#define CONFIG_USART_SAM_PORT_1_IRQ_PRIO ATMEL_SAM_USART_40028000_IRQ_0_PRIORITY
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#define CONFIG_USART_SAM_PORT_1_PERIPHERAL_ID ATMEL_SAM_USART_40028000_PERIPHERAL_ID
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#define CONFIG_USART_SAM_PORT_2_NAME ATMEL_SAM_USART_4002C000_LABEL
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#define CONFIG_USART_SAM_PORT_2_BAUD_RATE ATMEL_SAM_USART_4002C000_CURRENT_SPEED
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#define CONFIG_USART_SAM_PORT_2_IRQ ATMEL_SAM_USART_4002C000_IRQ_0
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#define CONFIG_USART_SAM_PORT_2_IRQ_PRIO ATMEL_SAM_USART_4002C000_IRQ_0_PRIORITY
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#define CONFIG_USART_SAM_PORT_2_PERIPHERAL_ID ATMEL_SAM_USART_4002C000_PERIPHERAL_ID
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#define CONFIG_ADC_0_BASE_ADDRESS ATMEL_SAM_AFEC_4003C000_BASE_ADDRESS
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#define CONFIG_ADC_0_IRQ ATMEL_SAM_AFEC_4003C000_IRQ_0
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#define CONFIG_ADC_0_IRQ_PRI ATMEL_SAM_AFEC_4003C000_IRQ_0_PRIORITY
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#define CONFIG_ADC_0_NAME ATMEL_SAM_AFEC_4003C000_LABEL
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#define CONFIG_ADC_1_BASE_ADDRESS ATMEL_SAM_AFEC_40064000_BASE_ADDRESS
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#define CONFIG_ADC_1_IRQ ATMEL_SAM_AFEC_40064000_IRQ_0
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#define CONFIG_ADC_1_IRQ_PRI ATMEL_SAM_AFEC_40064000_IRQ_0_PRIORITY
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#define CONFIG_ADC_1_NAME ATMEL_SAM_AFEC_40064000_LABEL
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/* End of SoC Level DTS fixup file */
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