zephyr/arch
Andrew Boie 077b587447 x86: implement hw-based oops for both variants
We use a fixed value of 32 as the way interrupts/exceptions
are setup in x86_64's locore.S do not lend themselves to
Kconfig configuration of the vector to use.

HW-based kernel oops is now permanently on, there's no reason
to make it optional that I can see.

Default vectors for IPI and irq offload adjusted to not
collide.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-01-13 16:35:10 -05:00
..
arc arc: remove old macro used for event logger 2020-01-09 11:21:19 -05:00
arm arch: arm: Rewrite Cortex-R reset vector function. 2020-01-10 10:34:17 +01:00
common arch: arm: Move ARM code to AArch32 sub-directory 2019-12-20 11:40:59 -05:00
nios2 global: Remove leading/trailing blank lines in files 2019-12-11 19:17:27 +01:00
posix POSIX arch: Fix C++ main() linkage issue 2019-12-18 21:53:47 +01:00
riscv riscv: use standard MSTATUS 2020-01-06 13:27:45 -05:00
x86 x86: implement hw-based oops for both variants 2020-01-13 16:35:10 -05:00
xtensa xtensa: fix atomic_cas reporting value swapped even when not 2020-01-08 19:57:05 -05:00
CMakeLists.txt arch: Simplify private header include path configuration. 2019-11-06 16:07:32 -08:00
Kconfig arch: arm: Rewrite Cortex-R reset vector function. 2020-01-10 10:34:17 +01:00