zephyr/soc/arm/nxp_kinetis/k6x/dts_fixup.h
Andrei Gansari 02e217df50 drivers: eth_mcux: kinetis networking device Tree
Partially replaces Kinetis MCUX driver configuration from Kconfig to
Device Tree. Interrputs moved from defines configuration to DT.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2018-10-19 07:57:20 -05:00

138 lines
8.2 KiB
C

/* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_MCUX_0_BAUD_RATE NXP_KINETIS_UART_4006A000_CURRENT_SPEED
#define CONFIG_UART_MCUX_0_NAME NXP_KINETIS_UART_4006A000_LABEL
#define CONFIG_UART_MCUX_0_IRQ_ERROR NXP_KINETIS_UART_4006A000_IRQ_ERROR
#define CONFIG_UART_MCUX_0_IRQ_ERROR_PRI NXP_KINETIS_UART_4006A000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_0_IRQ_STATUS NXP_KINETIS_UART_4006A000_IRQ_STATUS
#define CONFIG_UART_MCUX_0_IRQ_STATUS_PRI NXP_KINETIS_UART_4006A000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_0_CLOCK_NAME NXP_KINETIS_UART_4006A000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_0_CLOCK_SUBSYS NXP_KINETIS_UART_4006A000_CLOCK_NAME
#define CONFIG_UART_MCUX_1_BAUD_RATE NXP_KINETIS_UART_4006B000_CURRENT_SPEED
#define CONFIG_UART_MCUX_1_NAME NXP_KINETIS_UART_4006B000_LABEL
#define CONFIG_UART_MCUX_1_IRQ_ERROR NXP_KINETIS_UART_4006B000_IRQ_ERROR
#define CONFIG_UART_MCUX_1_IRQ_ERROR_PRI NXP_KINETIS_UART_4006B000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_1_IRQ_STATUS NXP_KINETIS_UART_4006B000_IRQ_STATUS
#define CONFIG_UART_MCUX_1_IRQ_STATUS_PRI NXP_KINETIS_UART_4006B000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_1_CLOCK_NAME NXP_KINETIS_UART_4006B000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_1_CLOCK_SUBSYS NXP_KINETIS_UART_4006B000_CLOCK_NAME
#define CONFIG_UART_MCUX_2_BAUD_RATE NXP_KINETIS_UART_4006C000_CURRENT_SPEED
#define CONFIG_UART_MCUX_2_NAME NXP_KINETIS_UART_4006C000_LABEL
#define CONFIG_UART_MCUX_2_IRQ_ERROR NXP_KINETIS_UART_4006C000_IRQ_ERROR
#define CONFIG_UART_MCUX_2_IRQ_ERROR_PRI NXP_KINETIS_UART_4006C000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_2_IRQ_STATUS NXP_KINETIS_UART_4006C000_IRQ_STATUS
#define CONFIG_UART_MCUX_2_IRQ_STATUS_PRI NXP_KINETIS_UART_4006C000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_2_CLOCK_NAME NXP_KINETIS_UART_4006C000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_2_CLOCK_SUBSYS NXP_KINETIS_UART_4006C000_CLOCK_NAME
#define CONFIG_UART_MCUX_3_BAUD_RATE NXP_KINETIS_UART_4006D000_CURRENT_SPEED
#define CONFIG_UART_MCUX_3_NAME NXP_KINETIS_UART_4006D000_LABEL
#define CONFIG_UART_MCUX_3_IRQ_ERROR NXP_KINETIS_UART_4006D000_IRQ_ERROR
#define CONFIG_UART_MCUX_3_IRQ_ERROR_PRI NXP_KINETIS_UART_4006D000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_3_IRQ_STATUS NXP_KINETIS_UART_4006D000_IRQ_STATUS
#define CONFIG_UART_MCUX_3_IRQ_STATUS_PRI NXP_KINETIS_UART_4006D000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_3_CLOCK_NAME NXP_KINETIS_UART_4006D000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_3_CLOCK_SUBSYS NXP_KINETIS_UART_4006D000_CLOCK_NAME
#define CONFIG_UART_MCUX_4_BAUD_RATE NXP_KINETIS_UART_400EA000_CURRENT_SPEED
#define CONFIG_UART_MCUX_4_NAME NXP_KINETIS_UART_400EA000_LABEL
#define CONFIG_UART_MCUX_4_IRQ_ERROR NXP_KINETIS_UART_400EA000_IRQ_ERROR
#define CONFIG_UART_MCUX_4_IRQ_ERROR_PRI NXP_KINETIS_UART_400EA000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_4_IRQ_STATUS NXP_KINETIS_UART_400EA000_IRQ_STATUS
#define CONFIG_UART_MCUX_4_IRQ_STATUS_PRI NXP_KINETIS_UART_400EA000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_4_CLOCK_NAME NXP_KINETIS_UART_400EA000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_4_CLOCK_SUBSYS NXP_KINETIS_UART_400EA000_CLOCK_NAME
#define CONFIG_UART_MCUX_5_BAUD_RATE NXP_KINETIS_UART_400EB000_CURRENT_SPEED
#define CONFIG_UART_MCUX_5_NAME NXP_KINETIS_UART_400EB000_LABEL
#define CONFIG_UART_MCUX_5_IRQ_ERROR NXP_KINETIS_UART_400EB000_IRQ_ERROR
#define CONFIG_UART_MCUX_5_IRQ_ERROR_PRI NXP_KINETIS_UART_400EB000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_5_IRQ_STATUS NXP_KINETIS_UART_400EB000_IRQ_STATUS
#define CONFIG_UART_MCUX_5_IRQ_STATUS_PRI NXP_KINETIS_UART_400EB000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_5_CLOCK_NAME NXP_KINETIS_UART_400EB000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_5_CLOCK_SUBSYS NXP_KINETIS_UART_400EB000_CLOCK_NAME
#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS
#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL
#define CONFIG_ADC_1_BASE_ADDRESS NXP_KINETIS_ADC16_400BB000_BASE_ADDRESS
#define CONFIG_ADC_1_IRQ NXP_KINETIS_ADC16_400BB000_IRQ_0
#define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY
#define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL
#define CONFIG_FTM_3_BASE_ADDRESS NXP_KINETIS_FTM_400B9000_BASE_ADDRESS
#define CONFIG_FTM_3_IRQ NXP_KINETIS_FTM_400B9000_IRQ_0
#define CONFIG_FTM_3_IRQ_PRI NXP_KINETIS_FTM_400B9000_IRQ_0_PRIORITY
#define CONFIG_FTM_3_NAME NXP_KINETIS_FTM_400B9000_LABEL
#define CONFIG_SIM_BASE_ADDRESS NXP_KINETIS_SIM_40047000_BASE_ADDRESS
#define CONFIG_SIM_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_I2C_0_NAME NXP_KINETIS_I2C_40066000_LABEL
#define CONFIG_I2C_MCUX_0_BASE_ADDRESS NXP_KINETIS_I2C_40066000_BASE_ADDRESS
#define CONFIG_I2C_MCUX_0_IRQ NXP_KINETIS_I2C_40066000_IRQ_0
#define CONFIG_I2C_MCUX_0_IRQ_PRI NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY
#define CONFIG_I2C_MCUX_0_BITRATE NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY
#define CONFIG_I2C_1_NAME NXP_KINETIS_I2C_40067000_LABEL
#define CONFIG_I2C_MCUX_1_BASE_ADDRESS NXP_KINETIS_I2C_40067000_BASE_ADDRESS
#define CONFIG_I2C_MCUX_1_IRQ NXP_KINETIS_I2C_40067000_IRQ_0
#define CONFIG_I2C_MCUX_1_IRQ_PRI NXP_KINETIS_I2C_40067000_IRQ_0_PRIORITY
#define CONFIG_I2C_MCUX_1_BITRATE NXP_KINETIS_I2C_40067000_CLOCK_FREQUENCY
#define FLASH_DEV_BASE_ADDRESS NXP_KINETIS_FTFE_40020000_BASE_ADDRESS
#define FLASH_DEV_NAME NXP_KINETIS_FTFE_40020000_LABEL
#define CONFIG_WDT_0_NAME NXP_KINETIS_WDOG_40052000_LABEL
#define CONFIG_WDT_0_BASE_ADDRESS NXP_KINETIS_WDOG_40052000_BASE_ADDRESS
#define CONFIG_WDT_0_IRQ NXP_KINETIS_WDOG_40052000_IRQ_0
#define CONFIG_WDT_0_IRQ_PRI NXP_KINETIS_WDOG_40052000_IRQ_0_PRIORITY
#define CONFIG_WDT_0_CLOCK_NAME NXP_KINETIS_WDOG_40052000_CLOCK_CONTROLLER
#define CONFIG_WDT_0_CLOCK_SUBSYS NXP_KINETIS_WDOG_40052000_CLOCK_NAME
#define CONFIG_SPI_0_NAME NXP_KINETIS_DSPI_4002C000_LABEL
#define CONFIG_SPI_0_BASE_ADDRESS NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS
#define CONFIG_SPI_0_IRQ NXP_KINETIS_DSPI_4002C000_IRQ_0
#define CONFIG_SPI_0_IRQ_PRI NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY
#define CONFIG_SPI_0_CLOCK_NAME NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER
#define CONFIG_SPI_0_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002C000_CLOCK_NAME
#define CONFIG_SPI_1_NAME NXP_KINETIS_DSPI_4002D000_LABEL
#define CONFIG_SPI_1_BASE_ADDRESS NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ NXP_KINETIS_DSPI_4002D000_IRQ_0
#define CONFIG_SPI_1_IRQ_PRI NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_CLOCK_NAME NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER
#define CONFIG_SPI_1_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002D000_CLOCK_NAME
#define CONFIG_SPI_2_NAME NXP_KINETIS_DSPI_400AC000_LABEL
#define CONFIG_SPI_2_BASE_ADDRESS NXP_KINETIS_DSPI_400AC000_BASE_ADDRESS
#define CONFIG_SPI_2_IRQ NXP_KINETIS_DSPI_400AC000_IRQ_0
#define CONFIG_SPI_2_IRQ_PRI NXP_KINETIS_DSPI_400AC000_IRQ_0_PRIORITY
#define CONFIG_SPI_2_CLOCK_NAME NXP_KINETIS_DSPI_400AC000_CLOCK_CONTROLLER
#define CONFIG_SPI_2_CLOCK_SUBSYS NXP_KINETIS_DSPI_400AC000_CLOCK_NAME
#define CONFIG_USBD_KINETIS_NAME NXP_KINETIS_USBD_40072000_LABEL
#define CONFIG_USBD_KINETIS_IRQ NXP_KINETIS_USBD_40072000_IRQ_USB_OTG
#define CONFIG_USBD_KINETIS_IRQ_PRI NXP_KINETIS_USBD_40072000_IRQ_USB_OTG_PRIORITY
#define CONFIG_USBD_KINETIS_BASE_ADDRESS NXP_KINETIS_USBD_40072000_BASE_ADDRESS
#define CONFIG_USBD_KINETIS_NUM_BIDIR_EP NXP_KINETIS_USBD_40072000_NUM_BIDIR_ENDPOINTS
#define CONFIG_ETH_MCUX_0_NAME ETH_LABEL
#define CONFIG_ETH_MCUX_0_MAC3 NXP_KINETIS_ETHERNET_400C0004_LOCAL_MAC_ADDRESS_3
#define CONFIG_ETH_MCUX_0_MAC4 NXP_KINETIS_ETHERNET_400C0004_LOCAL_MAC_ADDRESS_4
#define CONFIG_ETH_MCUX_0_MAC5 NXP_KINETIS_ETHERNET_400C0004_LOCAL_MAC_ADDRESS_5
/* IRQs */
#define CONFIG_IRQ_ETH_IEEE1588_TMR NXP_KINETIS_ETHERNET_400C0004_IRQ_ERR_MISC
#define CONFIG_IRQ_ETH_RX NXP_KINETIS_ETHERNET_400C0004_IRQ_RX
#define CONFIG_IRQ_ETH_TX NXP_KINETIS_ETHERNET_400C0004_IRQ_TX
#define CONFIG_IRQ_ETH_ERR_MISC NXP_KINETIS_ETHERNET_400C0004_IRQ_ERR_MISC
#define CONFIG_ETH_MCUX_0_IRQ_PRI NXP_KINETIS_ETHERNET_400C0004_IRQ_RX_PRIORITY
/* End of SoC Level DTS fixup file */