b43af743b7
Decisions on compiler optimizations were done on the architecture level, this does not scale and some SoCs will have different optimization levels or compiler options needed. Moving this to the SoC makes it easy to optimize differently when using the same CPU which we use to set the right optimization now on the architecture level. For IAMCU platforms, use the right architecture and tuning. -march=lakemont -mtune=lakemont -miamcu -msoft-float Change-Id: I0f77cffe7a139f8b2620935094437d0dfd160dfe Signed-off-by: Anas Nashif <anas.nashif@intel.com>
5 lines
158 B
Makefile
5 lines
158 B
Makefile
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KBUILD_CFLAGS += $(call cc-option,-mARCv2EM) \
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$(call cc-option,-mav2em,) $(call cc-option,-mno-sdata)
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KBUILD_AFLAGS += $(KBUILD_CFLAGS)
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