Andy Ross 005e12bdac soc/intel_adsp: Add hardware race workaround to cavstool ... On cAVS 1.8 (specifically) there seems to be a propagation delay on the IPC registers. Hitting the TDA register to signal DONE too soon after clearing the interrupt via TDR can cause the interrupt to be dropped. Merely polling for it to read back correctly isn't sufficient, we need an actual sleep here. (The behavior that a message won't send while an existing message is in progress is actually a hardware feature that is new with 1.8. My guess is it's a little glitchy in its first version.) Signed-off-by: Andy Ross <andrew.j.ross@intel.com>		2022-03-01 09:59:15 -05:00
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cavs_v15	arch/xtensa: Rework irq_offload: automatic config, SMP-safe	2022-02-21 22:10:03 -05:00
cavs_v18	arch/xtensa: Rework irq_offload: automatic config, SMP-safe	2022-02-21 22:10:03 -05:00
cavs_v20	arch/xtensa: Rework irq_offload: automatic config, SMP-safe	2022-02-21 22:10:03 -05:00
cavs_v25	soc/intel_adsp: add intel_adsp_cavs25_tgph board	2022-02-25 14:28:45 -06:00
common	tests/intel_adsp: MP core power fixups for older cAVS platforms	2022-03-01 09:59:15 -05:00
tools	soc/intel_adsp: Add hardware race workaround to cavstool	2022-03-01 09:59:15 -05:00
CMakeLists.txt	xtensa: set toolchain variant per SoC	2020-12-20 14:30:50 -05:00
Kconfig	soc/intel_adsp: Add a cavs_ipc driver to manage host IPC	2022-03-01 09:59:15 -05:00
Kconfig.defconfig	arch/xtensa: Promote adsp RPO/cache utilities to an arch API	2022-01-11 11:53:53 +01:00
Kconfig.soc	soc/xtensa/intel_adsp: Upstream updates	2020-10-21 06:38:53 -04:00