143f9bfd4e
When enabled, instead of erasing entire flash page at once, page will be erased in defined time slices. Erasing single page stalls CPU for significant time share (~80ms) and partial erase divides the operation in to the shorter time periods, resuming CPU operation in meantime and enabling better scheduling of time sensitive operations. Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
143 lines
3.3 KiB
Plaintext
143 lines
3.3 KiB
Plaintext
# Nordic Semiconductor nRF53 MCU line
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# Copyright (c) 2019 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config SOC_NRF5340_CPUAPP
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depends on SOC_SERIES_NRF53X
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bool
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select CPU_HAS_NRF_IDAU
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select CPU_HAS_FPU
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select ARMV8_M_DSP
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select HAS_SYS_POWER_STATE_DEEP_SLEEP_1
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select HAS_HW_NRF_CC312
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select HAS_HW_NRF_CLOCK
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select HAS_HW_NRF_DPPIC
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select HAS_HW_NRF_EGU0
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select HAS_HW_NRF_EGU1
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select HAS_HW_NRF_EGU2
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select HAS_HW_NRF_EGU3
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select HAS_HW_NRF_EGU4
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select HAS_HW_NRF_EGU5
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select HAS_HW_NRF_GPIO0
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select HAS_HW_NRF_GPIO1
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select HAS_HW_NRF_GPIOTE
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select HAS_HW_NRF_I2S
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select HAS_HW_NRF_IPC
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select HAS_HW_NRF_NFCT
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select HAS_HW_NRF_NVMC_PE
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select HAS_HW_NRF_PDM
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select HAS_HW_NRF_POWER
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select HAS_HW_NRF_PWM0
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select HAS_HW_NRF_PWM1
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select HAS_HW_NRF_PWM2
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select HAS_HW_NRF_PWM3
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select HAS_HW_NRF_RTC0
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select HAS_HW_NRF_RTC1
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select HAS_HW_NRF_SAADC
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select HAS_HW_NRF_SPIM0
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select HAS_HW_NRF_SPIM1
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select HAS_HW_NRF_SPIM2
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select HAS_HW_NRF_SPIM3
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select HAS_HW_NRF_SPIM4
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select HAS_HW_NRF_SPIS0
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select HAS_HW_NRF_SPIS1
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select HAS_HW_NRF_SPIS2
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select HAS_HW_NRF_SPIS3
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select HAS_HW_NRF_SPU
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select HAS_HW_NRF_TIMER0
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select HAS_HW_NRF_TIMER1
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select HAS_HW_NRF_TIMER2
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select HAS_HW_NRF_TWIM0
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select HAS_HW_NRF_TWIM1
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select HAS_HW_NRF_TWIM2
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select HAS_HW_NRF_TWIM3
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select HAS_HW_NRF_TWIS0
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select HAS_HW_NRF_TWIS1
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select HAS_HW_NRF_TWIS2
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select HAS_HW_NRF_TWIS3
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select HAS_HW_NRF_UARTE0
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select HAS_HW_NRF_UARTE1
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select HAS_HW_NRF_UARTE2
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select HAS_HW_NRF_UARTE3
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select HAS_HW_NRF_USBD
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select HAS_HW_NRF_USBREG
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select HAS_HW_NRF_WDT0
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select HAS_HW_NRF_WDT1
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config SOC_NRF5340_CPUNET
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depends on SOC_SERIES_NRF53X
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bool
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select HAS_HW_NRF_ACL
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select HAS_HW_NRF_CLOCK
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select HAS_HW_NRF_DPPIC
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select HAS_HW_NRF_EGU0
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select HAS_HW_NRF_GPIO0
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select HAS_HW_NRF_GPIO1
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select HAS_HW_NRF_GPIOTE
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select HAS_HW_NRF_IPC
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select HAS_HW_NRF_NVMC_PE
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select HAS_HW_NRF_POWER
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select HAS_HW_NRF_RADIO_BLE_CODED
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select HAS_HW_NRF_RADIO_IEEE802154
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select HAS_HW_NRF_RNG
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select HAS_HW_NRF_RTC0
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select HAS_HW_NRF_RTC1
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select HAS_HW_NRF_SPIM0
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select HAS_HW_NRF_SPIS0
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select HAS_HW_NRF_TEMP
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select HAS_HW_NRF_TIMER0
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select HAS_HW_NRF_TIMER1
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select HAS_HW_NRF_TIMER2
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select HAS_HW_NRF_TWIM0
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select HAS_HW_NRF_TWIS0
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select HAS_HW_NRF_UARTE0
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select HAS_HW_NRF_WDT
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choice
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prompt "nRF53x MCU Selection"
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depends on SOC_SERIES_NRF53X
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config SOC_NRF5340_CPUAPP_QKAA
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bool "NRF5340_CPUAPP_QKAA"
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select SOC_NRF5340_CPUAPP
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config SOC_NRF5340_CPUNET_QKAA
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bool "NRF5340_CPUNET_QKAA"
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select SOC_NRF5340_CPUNET
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endchoice
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if SOC_NRF5340_CPUAPP
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config SOC_DCDC_NRF53X_APP
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bool
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help
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Enable nRF53 series System on Chip Application MCU DC/DC converter.
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config SOC_DCDC_NRF53X_NET
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bool
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help
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Enable nRF53 series System on Chip Network MCU DC/DC converter.
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config SOC_DCDC_NRF53X_HV
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bool
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help
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Enable nRF53 series System on Chip High Voltage DC/DC converter.
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endif # SOC_NRF5340_CPUAPP
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config NRF_ENABLE_CACHE
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bool "Enable cache"
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depends on (SOC_NRF5340_CPUAPP && !TRUSTED_EXECUTION_NONSECURE) \
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|| SOC_NRF5340_CPUNET
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default y
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help
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Instruction and Data cache is available on nRF5340 CPUAPP
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(Application MCU). It may only be accessed by Secure code.
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Instruction cache only (I-Cache) is available in nRF5340
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CPUNET (Network MCU).
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