zephyr/soc/xtensa/esp32
Mohamed ElShahawi f9e0fa9af3 drivers: esp32/clock_control: support UART, I2C
- Change default CPU Clock to 240MHz
(PLL is activated)
- I2C, UART will use sysclk from clock driver
- esp32_enable_peripheral replaced by
clock_control_on

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-06-16 09:00:51 -05:00
..
include cleanup: include/: move misc/util.h to sys/util.h 2019-06-27 22:55:49 -04:00
CMakeLists.txt license: cleanup: add SPDX Apache-2.0 license identifier 2019-04-07 08:45:22 -04:00
esp32-mp.c zephyr: replace zephyr integer types with C99 types 2020-06-08 08:23:57 -05:00
Kconfig.defconfig kconfig: Clean up header comments and make them consistent 2019-11-04 17:31:27 -05:00
Kconfig.soc drivers: esp32/clock_control: Add Clock Driver 2020-06-16 09:00:51 -05:00
linker.ld drivers: esp32/clock_control: Add Clock Driver 2020-06-16 09:00:51 -05:00
sdkconfig.h global: Remove leading/trailing blank lines in files 2019-12-11 19:17:27 +01:00
soc.c zephyr: replace zephyr integer types with C99 types 2020-06-08 08:23:57 -05:00
soc.h drivers: esp32/clock_control: support UART, I2C 2020-06-16 09:00:51 -05:00