97ecad69f0
arch: arc: core: Add Cache Implementation function & prototype for arc Signed-off-by: Aastha Grover <aastha.grover@intel.com>
91 lines
2 KiB
C
91 lines
2 KiB
C
/*
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* Copyright (c) 2015 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_CACHE_H_
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#define ZEPHYR_INCLUDE_CACHE_H_
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#include <kernel.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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void arch_dcache_flush(void *addr, size_t size);
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void arch_dcache_invd(void *addr, size_t size);
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/**
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*
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* @brief Flush d-cache lines to main memory
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*
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* No alignment is required for either addr or size, but since
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* sys_cache_flush() iterates on the d-cache lines, a d-cache line alignment for
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* both is optimal.
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*
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* The d-cache line size is specified either via the CONFIG_CACHE_LINE_SIZE
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* kconfig option or it is detected at runtime.
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*
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* @param addr the pointer to start the multi-line flush
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* @param size the number of bytes that are to be flushed
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*
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* @return N/A
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*/
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static inline void sys_cache_flush(void *addr, size_t size)
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{
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if (IS_ENABLED(CONFIG_CACHE_FLUSHING)) {
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arch_dcache_flush(addr, size);
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}
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}
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/**
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*
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* @brief Invalidate d-cache lines
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*
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* No alignment is required for either addr or size, but since
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* sys_cache_invd() iterates on the d-cache lines, a d-cache line alignment for
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* both is optimal.
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*
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* The d-cache line size is specified either via the CONFIG_CACHE_LINE_SIZE
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* kconfig option or it is detected at runtime.
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*
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* @param addr the pointer to start address
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* @param size the number of bytes that are to be invalidated
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*
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* @return N/A
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*/
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static inline void sys_cache_invd(void *addr, size_t size)
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{
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if (IS_ENABLED(CONFIG_CACHE_FLUSHING)) {
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arch_dcache_invd(addr, size);
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}
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}
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/**
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*
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* @brief Get the d-cache line size.
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*
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* The API is provided to get the cache line size.
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*
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* @return size of the cache line or 0 if the cache is not enabled.
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*/
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static inline size_t sys_cache_line_size_get(void)
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{
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#ifdef CONFIG_CACHE_FLUSHING
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#ifdef CONFIG_CACHE_LINE_SIZE
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return CONFIG_CACHE_LINE_SIZE;
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#else
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return arch_cache_line_size_get();
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#endif /* CONFIG_CACHE_LINE_SIZE */
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#else
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return 0;
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#endif /* CONFIG_CACHE_FLUSHING */
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_INCLUDE_CACHE_H_ */
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