3d4fa57541
The true mmio-sram nodes should not have had a 'device_type' property. Remove it from the cases that we clearly know are SRAM. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
67 lines
1.3 KiB
Plaintext
67 lines
1.3 KiB
Plaintext
/*
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* Copyright (c) 2018 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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clock-frequency = <0>;
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compatible = "microsemi,miv", "riscv";
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device_type = "cpu";
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reg = <0>;
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riscv,isa = "rv32imac";
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hlic: interrupt-controller {
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#interrupt-cells = <1>;
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compatible = "riscv,cpu-intc";
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interrupt-controller;
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};
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "microsemi,miv-soc", "simple-bus";
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ranges;
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flash0: flash@80000000 {
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compatible = "soc-nv-flash";
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reg = <0x80000000 0x40000>;
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};
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sram0: memory@80040000 {
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compatible = "mmio-sram";
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reg = <0x80040000 0x40000>;
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};
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plic: interrupt-controller@40000000 {
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#interrupt-cells = <1>;
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compatible = "sifive,plic-1.0.0";
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interrupt-controller;
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interrupts-extended = <&hlic 11>;
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reg = <0x40000000 0x2000
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0x40002000 0x1fe000
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0x40200000 0x2000000>;
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reg-names = "prio", "irq_en", "reg";
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riscv,max-priority = <1>;
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riscv,ndev = <31>;
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};
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uart0: uart@70001000 {
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compatible = "microsemi,coreuart";
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reg = <0x70001000 0x1000>;
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label = "uart_0";
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status = "disabled";
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current-speed = <0>;
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clock-frequency = <0>;
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};
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};
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};
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