ebbb92d330
The atmel,pins property will be utilized to describe pin mux configuration. The property will be a phandle-array in which the phandle points to the given GPIO port the pin is on, the pin number, and the mux configuration. This change updates the atmel,sam-gpio binding to support that phandle-array and updates the associated SoC dtsi files as well. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
39 lines
566 B
YAML
39 lines
566 B
YAML
description: SAM GPIO PORT node
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compatible: "atmel,sam-gpio"
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include: [gpio-controller.yaml, base.yaml]
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properties:
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reg:
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required: true
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interrupts:
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required: true
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label:
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required: true
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peripheral-id:
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type: int
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description: peripheral ID
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required: true
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"#gpio-cells":
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const: 2
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"#atmel,pin-cells":
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type: int
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required: true
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const: 2
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description: Number of items to expect in a atmel,pins specifier
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gpio-cells:
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- pin
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- flags
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atmel,pin-cells:
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- pin
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- peripheral
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