b37ce93979
K_FOREVER/INT_MAX number of ticks needs delay cycles value of maximum order and exceeds 'int32' range. The typecast to 'int32' results in wrongly evaluating the value as less than 'MIN_DELAY' and chooses 'MIN_DELAY' over the actual delay cycles. Cap the 'MAX_TICKS' to INT32_MAX. fixes: #26632 Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
109 lines
2.5 KiB
C
109 lines
2.5 KiB
C
/*
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* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <drivers/timer/arm_arch_timer.h>
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#include <drivers/timer/system_timer.h>
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#include <sys_clock.h>
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#include <spinlock.h>
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#include <arch/cpu.h>
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#define CYC_PER_TICK ((uint64_t)sys_clock_hw_cycles_per_sec() \
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/ (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC)
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#define MAX_TICKS INT32_MAX
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#define MIN_DELAY (1000)
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static struct k_spinlock lock;
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static volatile uint64_t last_cycle;
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static void arm_arch_timer_compare_isr(void *arg)
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{
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ARG_UNUSED(arg);
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k_spinlock_key_t key = k_spin_lock(&lock);
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uint64_t curr_cycle = arm_arch_timer_count();
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uint32_t delta_ticks = (uint32_t)((curr_cycle - last_cycle) / CYC_PER_TICK);
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last_cycle += delta_ticks * CYC_PER_TICK;
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if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
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uint64_t next_cycle = last_cycle + CYC_PER_TICK;
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if ((uint64_t)(next_cycle - curr_cycle) < MIN_DELAY) {
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next_cycle += CYC_PER_TICK;
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}
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arm_arch_timer_set_compare(next_cycle);
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}
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k_spin_unlock(&lock, key);
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z_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ? delta_ticks : 1);
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}
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int z_clock_driver_init(struct device *device)
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{
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ARG_UNUSED(device);
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IRQ_CONNECT(ARM_ARCH_TIMER_IRQ, ARM_ARCH_TIMER_PRIO,
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arm_arch_timer_compare_isr, NULL, ARM_ARCH_TIMER_FLAGS);
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arm_arch_timer_set_compare(arm_arch_timer_count() + CYC_PER_TICK);
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arm_arch_timer_enable(true);
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irq_enable(ARM_ARCH_TIMER_IRQ);
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return 0;
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}
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void z_clock_set_timeout(int32_t ticks, bool idle)
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{
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ARG_UNUSED(idle);
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#if defined(CONFIG_TICKLESS_KERNEL)
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if (idle) {
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return;
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}
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ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : \
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MIN(MAX_TICKS, MAX(ticks - 1, 0));
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k_spinlock_key_t key = k_spin_lock(&lock);
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uint64_t curr_cycle = arm_arch_timer_count();
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uint64_t req_cycle = ticks * CYC_PER_TICK;
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/* Round up to next tick boundary */
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req_cycle += (curr_cycle - last_cycle) + (CYC_PER_TICK - 1);
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req_cycle = (req_cycle / CYC_PER_TICK) * CYC_PER_TICK;
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if ((req_cycle + last_cycle - curr_cycle) < MIN_DELAY) {
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req_cycle += CYC_PER_TICK;
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}
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arm_arch_timer_set_compare(req_cycle + last_cycle);
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k_spin_unlock(&lock, key);
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#endif
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}
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uint32_t z_clock_elapsed(void)
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{
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if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
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return 0;
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}
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k_spinlock_key_t key = k_spin_lock(&lock);
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uint32_t ret = (uint32_t)((arm_arch_timer_count() - last_cycle)
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/ CYC_PER_TICK);
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k_spin_unlock(&lock, key);
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return ret;
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}
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uint32_t z_timer_cycle_get_32(void)
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{
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return (uint32_t)arm_arch_timer_count();
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}
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