a1b77fd589
git grep -l 'u\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g" git grep -l 's\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g" Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
117 lines
3.3 KiB
C
117 lines
3.3 KiB
C
/*
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* Copyright (c) 2019 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT litex_pwm
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#include <device.h>
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#include <drivers/pwm.h>
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#include <zephyr/types.h>
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#define REG_EN_ENABLE 0x1
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#define REG_EN_DISABLE 0x0
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/* PWM device in LiteX has only one channel */
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#define NUMBER_OF_CHANNELS 1
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struct pwm_litex_cfg {
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uint32_t reg_en_size;
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uint32_t reg_width_size;
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uint32_t reg_period_size;
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volatile uint32_t *reg_en;
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volatile uint32_t *reg_width;
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volatile uint32_t *reg_period;
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};
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#define GET_PWM_CFG(dev) \
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((const struct pwm_litex_cfg *) dev->config_info)
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static void litex_set_reg(volatile uint32_t *reg, uint32_t reg_size, uint32_t val)
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{
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uint32_t shifted_data;
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volatile uint32_t *reg_addr;
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for (int i = 0; i < reg_size; ++i) {
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shifted_data = val >> ((reg_size - i - 1) * 8);
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reg_addr = ((volatile uint32_t *) reg) + i;
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*(reg_addr) = shifted_data;
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}
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}
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int pwm_litex_init(struct device *dev)
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{
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const struct pwm_litex_cfg *cfg = GET_PWM_CFG(dev);
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litex_set_reg(cfg->reg_en, cfg->reg_en_size, REG_EN_ENABLE);
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return 0;
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}
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int pwm_litex_pin_set(struct device *dev, uint32_t pwm, uint32_t period_cycles,
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uint32_t pulse_cycles, pwm_flags_t flags)
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{
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const struct pwm_litex_cfg *cfg = GET_PWM_CFG(dev);
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if (pwm >= NUMBER_OF_CHANNELS) {
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return -EINVAL;
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}
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litex_set_reg(cfg->reg_en, cfg->reg_en_size, REG_EN_DISABLE);
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litex_set_reg(cfg->reg_width, cfg->reg_width_size, pulse_cycles);
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litex_set_reg(cfg->reg_period, cfg->reg_period_size, period_cycles);
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litex_set_reg(cfg->reg_en, cfg->reg_en_size, REG_EN_ENABLE);
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return 0;
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}
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int pwm_litex_get_cycles_per_sec(struct device *dev, uint32_t pwm, uint64_t *cycles)
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{
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if (pwm >= NUMBER_OF_CHANNELS) {
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return -EINVAL;
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}
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*cycles = sys_clock_hw_cycles_per_sec();
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return 0;
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}
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static const struct pwm_driver_api pwm_litex_driver_api = {
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.pin_set = pwm_litex_pin_set,
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.get_cycles_per_sec = pwm_litex_get_cycles_per_sec,
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};
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/* Device Instantiation */
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/* LiteX regisers use only first byte from 4-bytes register, that's why they
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* occupy larger space in memory. We need to know the size that is
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* actually used, that is why the register size from dts is divided by 4.
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*/
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#define PWM_LITEX_INIT(n) \
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static const struct pwm_litex_cfg pwm_litex_cfg_##n = { \
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.reg_en = \
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(volatile uint32_t *) \
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DT_INST_REG_ADDR_BY_NAME(n, enable), \
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.reg_en_size = DT_INST_REG_SIZE_BY_NAME(n, enable) / 4, \
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.reg_width = \
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(volatile uint32_t *) \
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DT_INST_REG_ADDR_BY_NAME(n, width), \
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.reg_width_size = DT_INST_REG_SIZE_BY_NAME(n, width) / 4, \
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.reg_period = \
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(volatile uint32_t *) \
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DT_INST_REG_ADDR_BY_NAME(n, period), \
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.reg_period_size = DT_INST_REG_SIZE_BY_NAME(n, period) / 4, \
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}; \
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\
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DEVICE_AND_API_INIT(pwm_##n, \
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DT_INST_LABEL(n), \
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pwm_litex_init, \
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NULL, \
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&pwm_litex_cfg_##n, \
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POST_KERNEL, \
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CONFIG_PWM_LITEX_INIT_PRIORITY, \
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&pwm_litex_driver_api \
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);
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DT_INST_FOREACH_STATUS_OKAY(PWM_LITEX_INIT)
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