a1b77fd589
git grep -l 'u\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g" git grep -l 's\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g" Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
115 lines
2.9 KiB
C
115 lines
2.9 KiB
C
/*
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* Copyright (c) 2018 Google LLC.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <drivers/pinmux.h>
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#include <soc.h>
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struct pinmux_sam0_config {
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PortGroup *regs;
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};
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static int pinmux_sam0_set(struct device *dev, uint32_t pin, uint32_t func)
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{
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const struct pinmux_sam0_config *cfg = dev->config_info;
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bool odd_pin = pin & 1;
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int idx = pin / 2U;
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/* Each pinmux register holds the config for two pins. The
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* even numbered pin goes in the bits 0..3 and the odd
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* numbered pin in bits 4..7.
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*/
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if (odd_pin) {
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cfg->regs->PMUX[idx].bit.PMUXO = func;
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} else {
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cfg->regs->PMUX[idx].bit.PMUXE = func;
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}
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cfg->regs->PINCFG[pin].bit.PMUXEN = 1;
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return 0;
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}
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static int pinmux_sam0_get(struct device *dev, uint32_t pin, uint32_t *func)
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{
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const struct pinmux_sam0_config *cfg = dev->config_info;
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bool odd_pin = pin & 1;
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int idx = pin / 2U;
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if (odd_pin) {
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*func = cfg->regs->PMUX[idx].bit.PMUXO;
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} else {
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*func = cfg->regs->PMUX[idx].bit.PMUXE;
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}
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return 0;
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}
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static int pinmux_sam0_pullup(struct device *dev, uint32_t pin, uint8_t func)
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{
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return -ENOTSUP;
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}
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static int pinmux_sam0_input(struct device *dev, uint32_t pin, uint8_t func)
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{
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return -ENOTSUP;
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}
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static int pinmux_sam0_init(struct device *dev)
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{
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/* Nothing to do. The GPIO clock is enabled at reset. */
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return 0;
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}
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const struct pinmux_driver_api pinmux_sam0_api = {
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.set = pinmux_sam0_set,
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.get = pinmux_sam0_get,
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.pullup = pinmux_sam0_pullup,
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.input = pinmux_sam0_input,
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};
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(pinmux_a), okay)
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static const struct pinmux_sam0_config pinmux_sam0_config_0 = {
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.regs = (PortGroup *)DT_REG_ADDR(DT_NODELABEL(pinmux_a)),
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};
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DEVICE_AND_API_INIT(pinmux_sam0_0, DT_LABEL(DT_NODELABEL(pinmux_a)),
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pinmux_sam0_init, NULL, &pinmux_sam0_config_0,
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PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY,
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&pinmux_sam0_api);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(pinmux_b), okay)
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static const struct pinmux_sam0_config pinmux_sam0_config_1 = {
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.regs = (PortGroup *)DT_REG_ADDR(DT_NODELABEL(pinmux_b)),
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};
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DEVICE_AND_API_INIT(pinmux_sam0_1, DT_LABEL(DT_NODELABEL(pinmux_b)),
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pinmux_sam0_init, NULL, &pinmux_sam0_config_1,
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PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY,
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&pinmux_sam0_api);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(pinmux_c), okay)
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static const struct pinmux_sam0_config pinmux_sam0_config_2 = {
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.regs = (PortGroup *)DT_REG_ADDR(DT_NODELABEL(pinmux_c)),
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};
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DEVICE_AND_API_INIT(pinmux_sam0_2, DT_LABEL(DT_NODELABEL(pinmux_c)),
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pinmux_sam0_init, NULL, &pinmux_sam0_config_2,
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PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY,
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&pinmux_sam0_api);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(pinmux_d), okay)
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static const struct pinmux_sam0_config pinmux_sam0_config_3 = {
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.regs = (PortGroup *)DT_REG_ADDR(DT_NODELABEL(pinmux_d)),
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};
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DEVICE_AND_API_INIT(pinmux_sam0_3, DT_LABEL(DT_NODELABEL(pinmux_d)),
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pinmux_sam0_init, NULL, &pinmux_sam0_config_3,
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PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY,
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&pinmux_sam0_api);
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#endif
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