11972a48c2
Add support to register callback function for each PCIe reset. These callback functions are executed from corresponding PCIe reset interrupt handler if registered. Signed-off-by: Shivaraj Shetty <shivaraj.shetty@broadcom.com> Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
82 lines
2 KiB
C
82 lines
2 KiB
C
/*
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* Copyright 2020 Broadcom
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DRIVERS_PCIE_EP_BCM_IPROC_H_
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#define ZEPHYR_INCLUDE_DRIVERS_PCIE_EP_BCM_IPROC_H_
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#include <sys/util.h>
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#define PCIE_LINK_STATUS_CONTROL 0xbc
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#define PCIE_LINKSPEED_SHIFT 16
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#define PCIE_LINKWIDTH_SHIFT 20
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#define PCIE_LINKSPEED_MASK 0xf
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#define PCIE_LINKWIDTH_MASK 0x3f
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#define PCIE_RC_MODE_MASK 0x1
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#define MSI_ADDR_L 0x5c
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#define MSI_ADDR_H 0x60
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#define MSI_DATA 0x64
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#define ID_VAL4_OFFSET 0x440
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#define MSIX_CONTROL 0x4c0
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#define MSIX_TBL_OFF_BIR 0x4c4
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#define MSIX_PBA_OFF_BIR 0x4c8
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#define MSIX_TBL_B2_10000 0x10002
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#define MSIX_PBA_B2_10800 0x10802
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#define MSIX_TABLE_ENTRY_SIZE 16
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#define MSIX_TABLE_SIZE 16
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#define MSIX_TBL_DATA_OFF 8
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#define MSIX_TABLE_BASE 0x20010000
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#define MSI_COUNT_SHIFT 12
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#define MSI_COUNT_MASK 0x7000
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#define MSI_COUNT_VAL 4
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#define MSI_CSR_MASK 0xffffffff
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#define MSI_EN_MASK 0xf
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#define PAXB_OARR_VALID BIT(0)
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#define PCIE_DEV_CTRL_OFFSET 0x4d8
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#define FLR_IN_PROGRESS BIT(27)
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#define PCIE_TL_CTRL0_OFFSET 0x800
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#define AUTO_CLR_FLR_AFTER_DELAY BIT(13) /* Clears FLR after 55ms */
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#define AUTO_CLR_CRS_POST_FLR BIT(14)
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#define PCIE0_FLR_INTR BIT(20)
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#define PCIE0_FLR_PERST_INTR BIT(21)
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enum pcie_outbound_map {
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PCIE_MAP_LOWMEM_IDX,
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PCIE_MAP_HIGHMEM_IDX,
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};
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struct iproc_pcie_ep_config {
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struct iproc_pcie_reg *base; /* Base address of PAXB registers */
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uint32_t reg_size;
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uint32_t map_low_base; /* Base addr of outbound mapping at lowmem */
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uint32_t map_low_size;
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uint64_t map_high_base; /* Base addr of outbound mapping at highmem */
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uint32_t map_high_size;
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unsigned int id;
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};
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struct iproc_pcie_ep_ctx {
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struct k_spinlock ob_map_lock;
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struct k_spinlock raise_irq_lock;
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bool highmem_in_use;
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bool lowmem_in_use;
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/* Callback function for reset interrupt */
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pcie_ep_reset_callback_t reset_cb[PCIE_RESET_MAX];
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/* Callback data for reset interrupt */
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void *reset_data[PCIE_RESET_MAX];
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};
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#endif /* ZEPHYR_INCLUDE_DRIVERS_PCIE_EP_BCM_IPROC_H_ */
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