bd985dcd67
Add basic driver for GIC V3 interrupt controller. This implementation supports - distributor, re-distributor and cpu interface initialization - configuration and handling of SPI, PPI and SGI. - V2 Legacy mode is not supported and uses system interface. Current implementation supports GIC secure state only. All interrupts are routed to Secure EL1 as 'irq' by configuring them as Group1 Secure. TODO: - MPIDR based affinity routing setting. - percpu redistributor probe - message based SPI and SGI generation api - EL1NS support. Legacy mode support. - LPI/ITS is not supported. Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
49 lines
1.7 KiB
C
49 lines
1.7 KiB
C
/*
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* Copyright 2020 Broadcom
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DRIVERS_INTC_GIC_COMMON_PRIV_H_
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#define ZEPHYR_INCLUDE_DRIVERS_INTC_GIC_COMMON_PRIV_H_
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/* Offsets from GICD base or GICR(n) SGI_base */
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#define GIC_DIST_IGROUPR 0x0080
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#define GIC_DIST_ISENABLER 0x0100
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#define GIC_DIST_ICENABLER 0x0180
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#define GIC_DIST_ISPENDR 0x0200
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#define GIC_DIST_ICPENDR 0x0280
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#define GIC_DIST_ISACTIVER 0x0300
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#define GIC_DIST_ICACTIVER 0x0380
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#define GIC_DIST_IPRIORITYR 0x0400
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#define GIC_DIST_ITARGETSR 0x0800
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#define GIC_DIST_ICFGR 0x0c00
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#define GIC_DIST_IGROUPMODR 0x0d00
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#define GIC_DIST_SGIR 0x0f00
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/* GICD GICR common access macros */
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#define IGROUPR(base, n) (base + GIC_DIST_IGROUPR + (n) * 4)
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#define ISENABLER(base, n) (base + GIC_DIST_ISENABLER + (n) * 4)
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#define ICENABLER(base, n) (base + GIC_DIST_ICENABLER + (n) * 4)
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#define ISPENDR(base, n) (base + GIC_DIST_ISPENDR + (n) * 4)
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#define ICPENDR(base, n) (base + GIC_DIST_ICPENDR + (n) * 4)
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#define IPRIORITYR(base, n) (base + GIC_DIST_IPRIORITYR + n)
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#define ITARGETSR(base, n) (base + GIC_DIST_ITARGETSR + (n) * 4)
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#define ICFGR(base, n) (base + GIC_DIST_ICFGR + (n) * 4)
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#define IGROUPMODR(base, n) (base + GIC_DIST_IGROUPMODR + (n) * 4)
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/*
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* selects redistributor SGI_base for current core for PPI and SGI
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* selects distributor base for SPI
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* The macro translates to distributor base for GICv2 and GICv1
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*/
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#if CONFIG_GIC_VER <= 2
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#define GET_DIST_BASE(intid) GIC_DIST_BASE
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#else
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#define GET_DIST_BASE(intid) ((intid < GIC_SPI_INT_BASE) ? \
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(GIC_GET_RDIST(GET_CPUID) + GICR_SGI_BASE_OFF) \
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: GIC_DIST_BASE)
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#endif
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#endif /* ZEPHYR_INCLUDE_DRIVERS_INTC_GIC_COMMON_PRIV_H */
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