bd985dcd67
Add basic driver for GIC V3 interrupt controller. This implementation supports - distributor, re-distributor and cpu interface initialization - configuration and handling of SPI, PPI and SGI. - V2 Legacy mode is not supported and uses system interface. Current implementation supports GIC secure state only. All interrupts are routed to Secure EL1 as 'irq' by configuring them as Group1 Secure. TODO: - MPIDR based affinity routing setting. - percpu redistributor probe - message based SPI and SGI generation api - EL1NS support. Legacy mode support. - LPI/ITS is not supported. Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
19 lines
1.1 KiB
CMake
19 lines
1.1 KiB
CMake
# SPDX-License-Identifier: Apache-2.0
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zephyr_sources_ifdef(CONFIG_ARCV2_INTERRUPT_UNIT intc_arcv2_irq_unit.c)
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zephyr_sources_ifdef(CONFIG_GIC_V1 intc_gic.c)
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zephyr_sources_ifdef(CONFIG_GIC_V2 intc_gic.c)
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zephyr_sources_ifdef(CONFIG_GIC_V3 intc_gicv3.c)
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zephyr_sources_ifdef(CONFIG_IOAPIC intc_ioapic.c)
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zephyr_sources_ifdef(CONFIG_LOAPIC intc_loapic.c intc_system_apic.c)
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zephyr_sources_ifdef(CONFIG_LOAPIC_SPURIOUS_VECTOR intc_loapic_spurious.S)
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zephyr_sources_ifdef(CONFIG_PLIC intc_plic.c)
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zephyr_sources_ifdef(CONFIG_SHARED_IRQ intc_shared_irq.c)
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zephyr_sources_ifdef(CONFIG_EXTI_STM32 intc_exti_stm32.c)
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zephyr_sources_ifdef(CONFIG_CAVS_ICTL intc_cavs.c)
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zephyr_sources_ifdef(CONFIG_DW_ICTL intc_dw.c)
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zephyr_sources_ifdef(CONFIG_RV32M1_INTMUX intc_rv32m1_intmux.c)
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zephyr_sources_ifdef(CONFIG_SAM0_EIC intc_sam0_eic.c)
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zephyr_sources_ifdef(CONFIG_VEXRISCV_LITEX_IRQ intc_vexriscv_litex.c)
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zephyr_sources_ifdef(CONFIG_SWERV_PIC intc_swerv_pic.c)
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