e71e803674
This enables the ACPI_EC1 interface which is typically accessed through ports 0x6A0 and 0x6A4 in Bios. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
41 lines
766 B
Plaintext
41 lines
766 B
Plaintext
# Microchip XEC ESPI configuration options
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# Copyright (c) 2019 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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config ESPI_XEC
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bool "XEC Microchip ESPI driver"
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depends on SOC_FAMILY_MEC
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help
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Enable the Microchip XEC ESPI driver.
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if ESPI_XEC
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config ESPI_OOB_CHANNEL
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default y
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config ESPI_FLASH_CHANNEL
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default y
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config ESPI_PERIPHERAL_HOST_IO
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default y
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config ESPI_PERIPHERAL_HOST_IO_PVT
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default y
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config ESPI_PERIPHERAL_DEBUG_PORT_80
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default y
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config ESPI_PERIPHERAL_UART
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default y
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config ESPI_PERIPHERAL_UART_SOC_MAPPING
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int "SoC port exposed as logical eSPI UART"
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default 2
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depends on ESPI_PERIPHERAL_UART
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help
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This tells the driver to which SoC UART to direct the UART traffic
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send over eSPI from host.
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endif #ESPI_XEC
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