6bb555ce83
add clock rate for RT series from ipg Kinetis does not need additional clock added Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
119 lines
2.5 KiB
C
119 lines
2.5 KiB
C
/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_imx_ccm
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#include <errno.h>
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#include <soc.h>
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#include <drivers/clock_control.h>
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#include <dt-bindings/clock/imx_ccm.h>
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#include <fsl_clock.h>
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#define LOG_LEVEL CONFIG_CLOCK_CONTROL_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(clock_control);
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static const clock_name_t lpspi_clocks[] = {
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kCLOCK_Usb1PllPfd1Clk,
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kCLOCK_Usb1PllPfd0Clk,
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kCLOCK_SysPllClk,
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kCLOCK_SysPllPfd2Clk,
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};
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static int mcux_ccm_on(struct device *dev,
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clock_control_subsys_t sub_system)
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{
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return 0;
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}
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static int mcux_ccm_off(struct device *dev,
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clock_control_subsys_t sub_system)
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{
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return 0;
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}
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static int mcux_ccm_get_subsys_rate(struct device *dev,
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clock_control_subsys_t sub_system,
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uint32_t *rate)
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{
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uint32_t clock_name = (uint32_t) sub_system;
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switch (clock_name) {
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#ifdef CONFIG_I2C_MCUX_LPI2C
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case IMX_CCM_LPI2C_CLK:
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if (CLOCK_GetMux(kCLOCK_Lpi2cMux) == 0) {
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*rate = CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 8
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/ (CLOCK_GetDiv(kCLOCK_Lpi2cDiv) + 1);
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} else {
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*rate = CLOCK_GetOscFreq()
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/ (CLOCK_GetDiv(kCLOCK_Lpi2cDiv) + 1);
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}
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break;
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#endif
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case IMX_CCM_LPSPI_CLK:
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{
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uint32_t lpspi_mux = CLOCK_GetMux(kCLOCK_LpspiMux);
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clock_name_t lpspi_clock = lpspi_clocks[lpspi_mux];
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*rate = CLOCK_GetFreq(lpspi_clock)
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/ (CLOCK_GetDiv(kCLOCK_LpspiDiv) + 1);
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break;
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}
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case IMX_CCM_LPUART_CLK:
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if (CLOCK_GetMux(kCLOCK_UartMux) == 0) {
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*rate = CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6
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/ (CLOCK_GetDiv(kCLOCK_UartDiv) + 1);
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} else {
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*rate = CLOCK_GetOscFreq()
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/ (CLOCK_GetDiv(kCLOCK_UartDiv) + 1);
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}
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break;
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#ifdef CONFIG_DISK_ACCESS_USDHC1
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case IMX_CCM_USDHC1_CLK:
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*rate = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) /
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(CLOCK_GetDiv(kCLOCK_Usdhc1Div) + 1U);
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break;
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#endif
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#ifdef CONFIG_DISK_ACCESS_USDHC2
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case IMX_CCM_USDHC2_CLK:
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*rate = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) /
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(CLOCK_GetDiv(kCLOCK_Usdhc2Div) + 1U);
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break;
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#endif
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#ifdef CONFIG_DMA_MCUX_EDMA
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case IMX_CCM_EDMA_CLK:
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*rate = CLOCK_GetIpgFreq();
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break;
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#endif
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}
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return 0;
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}
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static int mcux_ccm_init(struct device *dev)
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{
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return 0;
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}
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static const struct clock_control_driver_api mcux_ccm_driver_api = {
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.on = mcux_ccm_on,
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.off = mcux_ccm_off,
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.get_rate = mcux_ccm_get_subsys_rate,
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};
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DEVICE_AND_API_INIT(mcux_ccm, DT_INST_LABEL(0),
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&mcux_ccm_init,
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NULL, NULL,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&mcux_ccm_driver_api);
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