4acac3e9ef
- Support PLL for Higher Frequencies 80,160,240 MHz - Support XTAL Frequencies 26MHz, 40MHz - Clock Driver can't be disabled, because all of the other drivers will depend on it to get their operating Frequency based on chosen clock source (XTAL/PLL). - Add needed references to BBPLL i2c bus ROM functions. - Add `rtc` node to Device Tree. - Since All Peripherals Frequency is depending on CPU_CLK Source, `clock-source` property added to CPU node Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
36 lines
2 KiB
CMake
36 lines
2 KiB
CMake
# SPDX-License-Identifier: Apache-2.0
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_BEETLE beetle_clock_control.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_CCM clock_control_mcux_ccm.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_MCG clock_control_mcux_mcg.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_PCC clock_control_mcux_pcc.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_SCG clock_control_mcux_scg.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_SIM clock_control_mcux_sim.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF nrf_power_clock.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION nrf_clock_calibration.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_RV32M1_PCC clock_control_rv32m1_pcc.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_ESP32 clock_control_esp32.c)
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if(CONFIG_CLOCK_CONTROL_STM32_CUBE)
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if(CONFIG_SOC_SERIES_STM32MP1X)
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zephyr_sources(clock_stm32_ll_mp1.c)
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elseif(CONFIG_SOC_SERIES_STM32H7X)
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zephyr_sources(clock_stm32_ll_h7.c)
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else()
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zephyr_sources(clock_stm32_ll_common.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F0X clock_stm32f0_f3.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F1X clock_stm32f1.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F2X clock_stm32f2_f4_f7.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F3X clock_stm32f0_f3.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F4X clock_stm32f2_f4_f7.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F7X clock_stm32f2_f4_f7.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32G0X clock_stm32g0.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32L0X clock_stm32l0_l1.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32L1X clock_stm32l0_l1.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32L4X clock_stm32l4_l5_wb.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32L5X clock_stm32l4_l5_wb.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32WBX clock_stm32l4_l5_wb.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32G4X clock_stm32g4.c)
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endif()
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endif()
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