0e6ede8929
This commit renames the Kconfig `FLOAT` symbol to `FPU`, since this symbol only indicates that the hardware Floating Point Unit (FPU) is used and does not imply and/or indicate the general availability of toolchain-level floating point support (i.e. this symbol is not selected when building for an FPU-less platform that supports floating point operations through the toolchain-provided software floating point library). Moreover, given that the symbol that indicates the availability of FPU is named `CPU_HAS_FPU`, it only makes sense to use "FPU" in the name of the symbol that enables the FPU. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
110 lines
3.1 KiB
Plaintext
110 lines
3.1 KiB
Plaintext
# Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
menu "RISCV Options"
|
|
depends on RISCV
|
|
|
|
config ARCH
|
|
string
|
|
default "riscv64" if 64BIT
|
|
default "riscv32"
|
|
|
|
config COMPRESSED_ISA
|
|
bool
|
|
default y if 64BIT
|
|
|
|
config FLOAT_HARD
|
|
bool "Enable hard-float calling convention"
|
|
default y
|
|
depends on FPU
|
|
select COMPRESSED_ISA
|
|
help
|
|
This option enables the hard-float calling convention.
|
|
|
|
menu "RISCV Processor Options"
|
|
|
|
config INCLUDE_RESET_VECTOR
|
|
bool "Include Reset vector"
|
|
help
|
|
Include the reset vector stub, which initializes the stack and
|
|
prepares for running C code.
|
|
|
|
config RISCV_SOC_CONTEXT_SAVE
|
|
bool "Enable SOC-based context saving in IRQ handlers"
|
|
select RISCV_SOC_OFFSETS
|
|
help
|
|
Enable low-level SOC-specific context management, for SOCs
|
|
with extra state that must be saved when entering an
|
|
interrupt/exception, and restored on exit. If unsure, leave
|
|
this at the default value.
|
|
|
|
Enabling this option requires that the SoC provide a
|
|
soc_context.h header which defines the following macros:
|
|
|
|
- SOC_ESF_MEMBERS: structure component declarations to
|
|
allocate space for. The last such declaration should not
|
|
end in a semicolon, for portability. The generic RISC-V
|
|
architecture code will allocate space for these members in
|
|
a "struct soc_esf" type (typedefed to soc_esf_t), which will
|
|
be available if arch.h is included.
|
|
|
|
- SOC_ESF_INIT: structure contents initializer for struct soc_esf
|
|
state. The last initialized member should not end in a comma.
|
|
|
|
The generic architecture IRQ wrapper will also call
|
|
\_\_soc_save_context and \_\_soc_restore_context routines at
|
|
ISR entry and exit, respectively. These should typically
|
|
be implemented in assembly. If they were C functions, they
|
|
would have these signatures:
|
|
|
|
``void __soc_save_context(soc_esf_t *state);``
|
|
|
|
``void __soc_restore_context(soc_esf_t *state);``
|
|
|
|
The calls obey standard calling conventions; i.e., the state
|
|
pointer address is in a0, and ra contains the return address.
|
|
|
|
config RISCV_SOC_OFFSETS
|
|
bool "Enable SOC-based offsets"
|
|
help
|
|
Enabling this option requires that the SoC provide a soc_offsets.h
|
|
header which defines the following macros:
|
|
|
|
- GEN_SOC_OFFSET_SYMS(): a macro which expands to
|
|
GEN_OFFSET_SYM(soc_esf_t, soc_specific_member) calls
|
|
to ensure offset macros for SOC_ESF_MEMBERS are defined
|
|
in offsets.h. The last one should not end in a semicolon.
|
|
See gen_offset.h for more details.
|
|
|
|
config RISCV_SOC_INTERRUPT_INIT
|
|
bool "Enable SOC-based interrupt initialization"
|
|
help
|
|
Enable SOC-based interrupt initialization
|
|
(call soc_interrupt_init, within _IntLibInit when enabled)
|
|
|
|
config RISCV_GENERIC_TOOLCHAIN
|
|
bool "Compile using generic riscv32 toolchain"
|
|
default y
|
|
help
|
|
Compile using generic riscv32 toolchain.
|
|
Allow SOCs that have custom extended riscv ISA to still
|
|
compile with generic riscv32 toolchain.
|
|
|
|
config RISCV_HAS_CPU_IDLE
|
|
bool "Does SOC has CPU IDLE instruction"
|
|
help
|
|
Does SOC has CPU IDLE instruction
|
|
|
|
config GEN_ISR_TABLES
|
|
default y
|
|
|
|
config GEN_IRQ_VECTOR_TABLE
|
|
default n
|
|
|
|
config NUM_IRQS
|
|
int
|
|
|
|
endmenu
|
|
|
|
endmenu
|