zephyr/soc/riscv/riscv-ite
Dino Li 2ecdd8fa89 ITE soc/it8xxx2/linker: add sections for hw sha256 calculation
IT8XXX2 HW support sha256 calculation, and its calculation is
faster than FW. We place SHA256 message, hash and key data
(total 512bytes) in RAM. If we enable hw sha256, because
HW limits, the sha256 data must place in first 4KB of RAM.
We add sections for hw sha256 calculation in linker.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2022-12-14 09:51:25 +01:00
..
common ITE: soc: chip_chipregs: Add SPISC register structure 2022-11-09 10:44:29 +01:00
it8xxx2 ITE soc/it8xxx2/linker: add sections for hw sha256 calculation 2022-12-14 09:51:25 +01:00
CMakeLists.txt soc: it8xxx2: enable extensions by configuration options 2022-04-22 10:21:51 -05:00
Kconfig soc/riscv: it8xxx2 soc system 2020-12-16 08:47:36 -05:00
Kconfig.defconfig soc/riscv: it8xxx2 soc system 2020-12-16 08:47:36 -05:00
Kconfig.soc soc/riscv: it8xxx2 soc system 2020-12-16 08:47:36 -05:00