zephyr/soc/riscv/litex-vexriscv
Carlo Caione 5fece03d7d riscv: Introduce Zicsr and Zifencei extensions
And enable the new extensions on all the SoCs.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-08-29 16:57:18 +02:00
..
CMakeLists.txt riscv32: rename to riscv 2019-08-02 13:54:48 -07:00
Kconfig.defconfig kconfig: Clean up header comments and make them consistent 2019-11-04 17:31:27 -05:00
Kconfig.soc riscv: Introduce Zicsr and Zifencei extensions 2022-08-29 16:57:18 +02:00
linker.ld linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
soc.h soc: riscv: remove unused RISCV_RAM_BASE|SIZE definitions 2022-07-28 20:51:31 +02:00