8d2cbc639c
Add dts bindings for the NIOS2 QSPI controller and flash device and add nodes to the dts files for these devices as well. Signed-off-by: Kumar Gala <galak@kernel.org>
80 lines
1.4 KiB
Plaintext
80 lines
1.4 KiB
Plaintext
/* SPDX-License-Identifier: Apache-2.0 */
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#include "skeleton.dtsi"
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#include <zephyr/dt-bindings/i2c/i2c.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu: cpu@0 {
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device_type = "cpu";
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compatible = "altr,nios2f";
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reg = <0>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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reg = <0x00 0xb8000>;
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};
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sram0: memory@400000 {
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compatible = "mmio-sram";
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reg = <0x400000 0x20000>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&cpu>;
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ranges;
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uart0: uart@100000 {
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compatible = "ns16550";
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reg = <0x100000 0x400>;
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clock-frequency = <50000000>;
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interrupts = <1 0>;
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reg-shift = <2>;
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status = "disabled";
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};
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jtag_uart: uart@201000 {
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compatible = "altr,jtag-uart";
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reg = <0x201000 0x8>;
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status = "disabled";
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};
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i2c0: i2c@100200 {
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compatible = "altr,nios2-i2c";
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clock-frequency = <I2C_BITRATE_ULTRA>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x100200 0x400>;
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interrupts = <4 10>;
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};
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dma: dma@100200 {
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compatible = "altr,msgdma";
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reg = <0x1002c0 0x30>;
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interrupts = <3 3>;
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#dma-cells = <0>;
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};
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qspi: qspi@100240 {
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compatible = "altr,nios2-qspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x100240 0x40>, <0x8000000 0x4000000>;
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reg-names = "qspi", "qspi_mm";
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status = "disabled";
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};
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};
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};
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