6d06a8cea9
Although we can get the number of configured OUT and IN endpoints and endpoint capabilities from the DWC GHWCFGn registers, we need to configure the number of endpoint configuration structs at build time. On some platforms, we cannot access the hardware register at pre-init, so we use the GHWCFGn values from the devicetree to provide endpoint capabilities. This can be considered a workaround, and we may change the upper layer internals to avoid it in the future. Also, add a new vendor quirk to fill in platform-specific controller capabilities. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
74 lines
2.2 KiB
C
74 lines
2.2 KiB
C
/*
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* Copyright (c) 2023 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_USB_UDC_DWC2_H
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#define ZEPHYR_DRIVERS_USB_UDC_DWC2_H
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#include <stdint.h>
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#include <zephyr/device.h>
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#include <zephyr/drivers/usb/udc.h>
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#include <usb_dwc2_hw.h>
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/* Vendor quirks per driver instance */
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struct dwc2_vendor_quirks {
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/* Called at the beginning of udc_dwc2_init() */
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int (*init)(const struct device *dev);
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/* Called on udc_dwc2_enable() before the controller is initialized */
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int (*pre_enable)(const struct device *dev);
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/* Called on udc_dwc2_enable() after the controller is initialized */
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int (*post_enable)(const struct device *dev);
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/* Called at the end of udc_dwc2_disable() */
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int (*disable)(const struct device *dev);
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/* Called at the end of udc_dwc2_shutdown() */
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int (*shutdown)(const struct device *dev);
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/* Called at the end of IRQ handling */
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int (*irq_clear)(const struct device *dev);
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/* Called on driver pre-init */
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int (*caps)(const struct device *dev);
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};
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/* Driver configuration per instance */
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struct udc_dwc2_config {
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size_t num_in_eps;
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size_t num_out_eps;
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struct udc_ep_config *ep_cfg_in;
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struct udc_ep_config *ep_cfg_out;
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struct usb_dwc2_reg *const base;
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/* Pointer to pin control configuration or NULL */
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struct pinctrl_dev_config *const pcfg;
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/* Pointer to vendor quirks or NULL */
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struct dwc2_vendor_quirks *const quirks;
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void (*make_thread)(const struct device *dev);
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void (*irq_enable_func)(const struct device *dev);
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void (*irq_disable_func)(const struct device *dev);
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uint32_t ghwcfg1;
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uint32_t ghwcfg2;
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uint32_t ghwcfg4;
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};
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#define DWC2_QUIRK_FUNC_DEFINE(fname) \
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static inline int dwc2_quirk_##fname(const struct device *dev) \
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{ \
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const struct udc_dwc2_config *const config = dev->config; \
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struct dwc2_vendor_quirks *quirks = config->quirks; \
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\
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if (quirks != NULL && config->quirks->fname != NULL) { \
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return quirks->fname(dev); \
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} \
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\
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return 0; \
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}
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DWC2_QUIRK_FUNC_DEFINE(init)
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DWC2_QUIRK_FUNC_DEFINE(pre_enable)
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DWC2_QUIRK_FUNC_DEFINE(post_enable)
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DWC2_QUIRK_FUNC_DEFINE(disable)
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DWC2_QUIRK_FUNC_DEFINE(shutdown)
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DWC2_QUIRK_FUNC_DEFINE(irq_clear)
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DWC2_QUIRK_FUNC_DEFINE(caps)
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#endif /* ZEPHYR_DRIVERS_USB_UDC_DWC2_H */
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