c777ef255b
At present, many of the NXP S32 shim drivers do not make use of devicetree instance-based macros because the NXP S32 HAL relies on an index-based approach, requiring knowledge of the peripheral instance index during both compilation and runtime, and this index might not align with the devicetree instance index. The proposed solution in this patch eliminates this limitation by determining the peripheral instance index during compilation through macrobatics and defining the driver's ISR within the shim driver itself. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
67 lines
1.5 KiB
C
67 lines
1.5 KiB
C
/*
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* Copyright 2022-2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_SPI_SPI_NXP_S32_H_
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#define ZEPHYR_DRIVERS_SPI_SPI_NXP_S32_H_
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#include <zephyr/drivers/spi.h>
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#include <zephyr/logging/log.h>
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#define LOG_LEVEL CONFIG_SPI_LOG_LEVEL
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LOG_MODULE_REGISTER(spi_nxp_s32);
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#include "spi_context.h"
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#include <Spi_Ip.h>
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#define SPI_NXP_S32_NUM_PRESCALER 4U
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#define SPI_NXP_S32_NUM_SCALER 16U
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/* Modified SPI transfer format is not supported,
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* the maximum baudrate is 25Mhz.
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*/
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#define SPI_NXP_S32_MIN_FREQ 100000U
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#define SPI_NXP_S32_MAX_FREQ 25000000U
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#define SPI_NXP_S32_BYTE_PER_FRAME(frame_size) \
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(frame_size <= 8U) ? 1U : ((frame_size <= 16U) ? 2U : 4U)
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#define SPI_NXP_S32_MAX_BYTES_PER_PACKAGE(bytes_per_frame) \
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((UINT16_MAX / bytes_per_frame) * bytes_per_frame)
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struct spi_nxp_s32_baudrate_param {
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uint8_t scaler;
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uint8_t prescaler;
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uint32_t frequency;
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};
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struct spi_nxp_s32_data {
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uint8_t bytes_per_frame;
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uint32_t transfer_len;
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struct spi_context ctx;
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Spi_Ip_ExternalDeviceType transfer_cfg;
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Spi_Ip_DeviceParamsType transfer_params;
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};
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struct spi_nxp_s32_config {
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uint8_t num_cs;
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const struct device *clock_dev;
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clock_control_subsys_t clock_subsys;
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uint32_t sck_cs_delay;
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uint32_t cs_sck_delay;
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uint32_t cs_cs_delay;
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Spi_Ip_ConfigType *spi_hw_cfg;
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const struct pinctrl_dev_config *pincfg;
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#ifdef CONFIG_NXP_S32_SPI_INTERRUPT
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Spi_Ip_CallbackType cb;
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void (*irq_config_func)(const struct device *dev);
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#endif /* CONFIG_NXP_S32_SPI_INTERRUPT */
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};
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#endif /* ZEPHYR_DRIVERS_SPI_SPI_NXP_S32_H_ */
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