62dbe72cb7
Each PSCI interface versions have different DT compatible strings like arm,psci-0.2, arm,psci-1.1 and so on. However, the same driver can be used for all the versions by adding #define DT_COMPAT for required version and #undef DT_COMPAT for default version. Add support for PSCI cold reset, warm reset and cpu-on function IDs. Signed-off-by: Girisha Dengi <girisha.dengi@intel.com> Signed-off-by: Navinkumar Balabakthan <navinkumar.balabakthan@intel.com>
122 lines
5.3 KiB
C
122 lines
5.3 KiB
C
/*
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* Copyright 2020 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_PSCI_PSCI_H_
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#define ZEPHYR_DRIVERS_PSCI_PSCI_H_
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#include <zephyr/drivers/pm_cpu_ops/psci.h>
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#ifdef CONFIG_64BIT
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#define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN64_##name
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#else
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#define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN_##name
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#endif
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/* PSCI v0.2 interface */
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#define PSCI_0_2_FN_BASE 0x84000000
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#define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n))
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#define PSCI_0_2_64BIT 0x40000000
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#define PSCI_0_2_FN64_BASE (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT)
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#define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n))
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#define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0)
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#define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1)
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#define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2)
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#define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3)
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#define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4)
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#define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5)
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#define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6)
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#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7)
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#define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8)
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#define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9)
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#define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1)
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#define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3)
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#define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4)
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#define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5)
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#define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7)
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#define PSCI_0_2_FN64_SYSTEM_RESET PSCI_0_2_FN(9)
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/* PSCI v1.0 interface */
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#define PSCI_1_0_FN_BASE (0x84000000U)
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#define PSCI_1_0_64BIT (0x40000000U)
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#define PSCI_1_0_FN64_BASE (PSCI_1_0_FN_BASE + PSCI_1_0_64BIT)
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#define PSCI_1_0_FN(n) (PSCI_1_0_FN_BASE + (n))
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#define PSCI_1_0_FN64(n) (PSCI_1_0_FN64_BASE + (n))
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#define PSCI_1_0_FN_PSCI_VERSION PSCI_1_0_FN(0)
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#define PSCI_1_0_FN_CPU_SUSPEND PSCI_1_0_FN(1)
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#define PSCI_1_0_FN_CPU_OFF PSCI_1_0_FN(2)
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#define PSCI_1_0_FN_CPU_ON PSCI_1_0_FN(3)
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#define PSCI_1_0_FN_AFFINITY_INFO PSCI_1_0_FN(4)
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#define PSCI_1_0_FN_MIGRATE PSCI_1_0_FN(5)
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#define PSCI_1_0_FN_MIGRATE_INFO_TYPE PSCI_1_0_FN(6)
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#define PSCI_1_0_FN_MIGRATE_INFO_UP_CPU PSCI_1_0_FN(7)
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#define PSCI_1_0_FN_SYSTEM_OFF PSCI_1_0_FN(8)
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#define PSCI_1_0_FN_SYSTEM_RESET PSCI_1_0_FN(9)
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#define PSCI_1_0_FN_PSCI_FEATURES PSCI_1_0_FN(10)
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#define PSCI_1_0_FN64_CPU_SUSPEND PSCI_1_0_FN64(1)
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#define PSCI_1_0_FN64_CPU_ON PSCI_1_0_FN64(3)
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#define PSCI_1_0_FN64_AFFINITY_INFO PSCI_1_0_FN64(4)
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#define PSCI_1_0_FN64_MIGRATE PSCI_1_0_FN64(5)
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#define PSCI_1_0_FN64_MIGRATE_INFO_UP_CPU PSCI_1_0_FN64(7)
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/* PSCI function ID is same for both 32 and 64 bit.*/
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#define PSCI_1_0_FN64_SYSTEM_RESET PSCI_1_0_FN(9)
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#define PSCI_1_0_FN64_PSCI_FEATURES PSCI_1_0_FN(10)
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/* PSCI v1.1 interface. */
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#define PSCI_1_1_FN_BASE (0x84000000U)
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#define PSCI_1_1_64BIT (0x40000000U)
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#define PSCI_1_1_FN64_BASE (PSCI_1_1_FN_BASE + PSCI_1_1_64BIT)
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#define PSCI_1_1_FN(n) (PSCI_1_1_FN_BASE + (n))
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#define PSCI_1_1_FN64(n) (PSCI_1_1_FN64_BASE + (n))
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#define PSCI_1_1_FN_PSCI_VERSION PSCI_1_1_FN(0)
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#define PSCI_1_1_FN_CPU_SUSPEND PSCI_1_1_FN(1)
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#define PSCI_1_1_FN_CPU_OFF PSCI_1_1_FN(2)
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#define PSCI_1_1_FN_CPU_ON PSCI_1_1_FN(3)
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#define PSCI_1_1_FN_AFFINITY_INFO PSCI_1_1_FN(4)
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#define PSCI_1_1_FN_MIGRATE PSCI_1_1_FN(5)
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#define PSCI_1_1_FN_MIGRATE_INFO_TYPE PSCI_1_1_FN(6)
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#define PSCI_1_1_FN_MIGRATE_INFO_UP_CPU PSCI_1_1_FN(7)
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#define PSCI_1_1_FN_SYSTEM_OFF PSCI_1_1_FN(8)
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#define PSCI_1_1_FN_SYSTEM_RESET PSCI_1_1_FN(9)
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#define PSCI_1_1_FN_PSCI_FEATURES PSCI_1_1_FN(10)
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#define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_1_1_FN(18)
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#define PSCI_1_1_FN64_CPU_SUSPEND PSCI_1_1_FN64(1)
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#define PSCI_1_1_FN64_CPU_ON PSCI_1_1_FN64(3)
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#define PSCI_1_1_FN64_AFFINITY_INFO PSCI_1_1_FN64(4)
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#define PSCI_1_1_FN64_MIGRATE PSCI_1_1_FN64(5)
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#define PSCI_1_1_FN64_MIGRATE_INFO_UP_CPU PSCI_1_1_FN64(7)
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/* PSCI function ID is same for both 32 and 64 bit.*/
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#define PSCI_1_1_FN64_SYSTEM_RESET PSCI_1_1_FN(9)
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#define PSCI_1_1_FN64_PSCI_FEATURES PSCI_1_1_FN(10)
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#define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_1_1_FN64(18)
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/* PSCI return values (inclusive of all PSCI versions) */
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#define PSCI_RET_SUCCESS 0
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#define PSCI_RET_NOT_SUPPORTED -1
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#define PSCI_RET_INVALID_PARAMS -2
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#define PSCI_RET_DENIED -3
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#define PSCI_RET_ALREADY_ON -4
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#define PSCI_RET_ON_PENDING -5
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#define PSCI_RET_INTERNAL_FAILURE -6
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#define PSCI_RET_NOT_PRESENT -7
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#define PSCI_RET_DISABLED -8
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#define PSCI_RET_INVALID_ADDRESS -9
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typedef unsigned long (psci_fn)(unsigned long, unsigned long,
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unsigned long, unsigned long);
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struct psci_data_t {
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enum arm_smccc_conduit conduit;
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psci_fn *invoke_psci_fn;
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uint32_t ver;
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};
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/* PSCI configuration data. */
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struct psci_config_t {
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const char *method;
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};
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#endif /* ZEPHYR_DRIVERS_PSCI_PSCI_H_ */
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