The format currently expected by devices and sample display
application for BGR_565 is actually RGB_565 format with bytes
swapped (not B / R swapped). That is:
PIXEL_FORMAT_RGB_565:
* @code{.unparsed}
* 7......0 15.....8
* | gggBbbbb RrrrrGgg | ...
* @endcode
current PIXEL_FORMAT_BGR_565:
* @code{.unparsed}
* 7......0 15.....8
* | RrrrrGgg gggBbbbb | ...
* @endcode
This is explained in both st7796s display driver but also is
what is generated by the sample display application. As a video
format (ex: V4L2), such format is not mentioned as BGR (for
which R and B are swapped) but RGB_565X.
Within the whole Zephyr tree, rename the curremt BGR_565 format
into RGB_565X in order to emphasis that this is a byte swapped
format rather than a B/G component swapped format.
This also correct the description of the format in display.h
file, which wasn't correct based on what was being used by
display driver or sample display app.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
52 lines
1.3 KiB
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52 lines
1.3 KiB
Text
# Copyright 2022-2023 NXP
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# SPDX-License-Identifier: Apache-2.0
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config MIPI_DSI_MCUX
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bool "NXP MCUX MIPI-DSI Host Controller"
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default y
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depends on DT_HAS_NXP_IMX_MIPI_DSI_ENABLED
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help
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NXP MIPI DSI controller driver
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config MIPI_DSI_MCUX_2L
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bool "NXP MCUX MIPI-DSI 2L Controller"
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default y
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depends on DT_HAS_NXP_MIPI_DSI_2L_ENABLED
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help
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NXP MIPI DSI 2L controller driver
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if MIPI_DSI_MCUX_2L
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config MIPI_DSI_MCUX_2L_SMARTDMA
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bool "Use smartDMA controller with MIPI DSI"
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default y
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depends on DMA_MCUX_SMARTDMA
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help
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Use SMARTDMA. This accelerator will automatically
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convert RGB565 input data to RGB565X, and write it
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to the MIPI DSI.
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config MIPI_DSI_MCUX_NXP_DCNANO_LCDIF
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bool "Use NXP DCNano DBI controller with MIPI DSI"
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default y
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depends on DT_HAS_NXP_MIPI_DBI_DCNANO_LCDIF_ENABLED
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select MIPI_DBI
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help
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Use DCNano DBI controller for the data transfer.
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config MIPI_DSI_MCUX_2L_SWAP16
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bool "Swap 16 byte color"
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help
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Swap 16 byte color data from little to big endian format. When
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this Kconfig is enabled, the DSI expects RGB565 data in little endian
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format, which will then be byte swapped.
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endif # MIPI_DSI_MCUX_2L
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config MIPI_DSI_NXP_DWC
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bool "NXP DWC MIPI-DSI Host Controller"
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default y
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depends on DT_HAS_NXP_MIPI_DSI_DWC_ENABLED
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help
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NXP MIPI DSI DWC controller driver
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