d4549ed808
Executing code out of RAM on IT8xxx2 requires that the relevant addresses be mapped onto the CPU's instruction memory bus, referred to by ITE documentation as Instruction Local Memory (ILM). ILM mappings configure blocks of RAM to be used for accesses to chosen addresses when performing instruction fetch, instead of the memory that would normally be accessed at that address. ILM must be used for some chip features (particularly Flash self-programming, to execute from RAM while writing to Flash), and has historically been configured in the Flash driver. The RAM for that was hard-coded as a single 4k block in the linker script. Configuring ILM in the flash driver is confusing because it is used by other SoC code as well, currently in code that cannot depend on the Flash being functional or in hand-selected functions that seem performance-critical. This change moves ILM configuration to a new driver and dynamically allocates RAM to ILM in the linker script, allowing software use of the entire 64k RAM depending on configuration. This makes ILM configuration more discoverable and makes it much easier to correctly support the CODE_DATA_RELOCATION feature on this SoC. Signed-off-by: Peter Marheine <pmarheine@chromium.org>
14 lines
404 B
C
14 lines
404 B
C
/*
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* Copyright (c) 2020 ITE Corporation. All Rights Reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_ITE_IT8XXX2_H_
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#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_ITE_IT8XXX2_H_
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#include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
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#include <ilm.h>
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#include <soc.h>
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#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_ITE_IT8XXX2_H_ */
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